Attention is currently required from: Werner Zeh.
Mario Scheithauer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69434 )
Change subject: mb/siemens/mc_ehl2: Enable Marvell PHY interrupt ......................................................................
mb/siemens/mc_ehl2: Enable Marvell PHY interrupt
On this mainboard Marvell PHY INTn is routed to LED[2] pin.
Change-Id: I28a78afdcf0599bb998f906ce8056a0586e24f33 Signed-off-by: Mario Scheithauer mario.scheithauer@siemens.com --- M src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb 1 file changed, 18 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/69434/1
diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb index b61ea52..46eedbf 100644 --- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb +++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb @@ -194,6 +194,8 @@ register "led_0_ctrl" = "7" # LED[1]: On - Link, Blink - Activity, Off - No Link register "led_1_ctrl" = "1" + # INTn is routed to LED[2] pin + register "enable_int" = "true" device pnp 0.0 on end # PHY address end end @@ -205,6 +207,8 @@ register "led_0_ctrl" = "7" # LED[1]: On - Link, Blink - Activity, Off - No Link register "led_1_ctrl" = "1" + # INTn is routed to LED[2] pin + register "enable_int" = "true" device pnp 0.1 on end # PHY address end end @@ -219,6 +223,8 @@ register "led_0_ctrl" = "7" # LED[1]: On - Link, Blink - Activity, Off - No Link register "led_1_ctrl" = "1" + # INTn is routed to LED[2] pin + register "enable_int" = "true" device pnp 1.1 on end # PHY address end end