Change in coreboot[master]: mb/google/volteer: Set SkipCpuReplacementCheck for Volteer platform
Jamie Ryu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42789 )
Change subject: mb/google/volteer: Set SkipCpuReplacementCheck for Volteer platform ......................................................................
mb/google/volteer: Set SkipCpuReplacementCheck for Volteer platform
Enable SkipCpuReplacementCheck for Volteer to avoid forced MRC traning
Test=build and verified with volteer
Change-Id: I75b4a4609c172c341087077228e23c6d31a9e7e1 Signed-off-by: Jamie Ryu jamie.m.ryu@intel.com --- M src/mainboard/google/volteer/variants/baseboard/devicetree.cb 1 file changed, 3 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/42789/1
diff --git a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb index 705da1d..4deb29d 100644 --- a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb @@ -63,6 +63,9 @@ register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # M.2 WWAN register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC_SKIP)" # M.2 Camera
+ # CPU replacement check + register "SkipCpuReplacementCheck" = "1" + # EC host command ranges are in 0x800-0x8ff & 0x200-0x20f register "gen1_dec" = "0x00fc0801" register "gen2_dec" = "0x000c0201"
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/42789
to look at the new patch set (#2).
Change subject: mb/google/volteer: Enable SkipCpuReplacementCheck ......................................................................
mb/google/volteer: Enable SkipCpuReplacementCheck
Enable SkipCpuReplacementCheck in volteer baseboard to avoid forced MRC traning.
Test=build and verified with volteer
Change-Id: I75b4a4609c172c341087077228e23c6d31a9e7e1 Signed-off-by: Jamie Ryu jamie.m.ryu@intel.com --- M src/mainboard/google/volteer/variants/baseboard/devicetree.cb 1 file changed, 3 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/42789/2
Hello build bot (Jenkins), Shaunak Saha, Furquan Shaikh, Wonkyu Kim, Paul Menzel, Rizwan Qureshi, Duncan Laurie, Angel Pons, Nick Vaccaro, Srinidhi N Kaushik, Raj Astekar, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/42789
to look at the new patch set (#3).
Change subject: mb/intel/tglrvp: Enable CpuReplacementCheck ......................................................................
mb/intel/tglrvp: Enable CpuReplacementCheck
Enable CpuReplacementCheck for TGLRVP with a CPU socket.
Test=build and verified with tglrvp
Change-Id: I75b4a4609c172c341087077228e23c6d31a9e7e1 Signed-off-by: Jamie Ryu jamie.m.ryu@intel.com --- M src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb M src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb 2 files changed, 6 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/42789/3
Jamie Ryu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42789 )
Change subject: mb/intel/tglrvp: Enable CpuReplacementCheck ......................................................................
Patch Set 3: Code-Review+1
Wonkyu Kim has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42789 )
Change subject: mb/intel/tglrvp: Enable CpuReplacementCheck ......................................................................
Patch Set 3: Code-Review+2
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/42789 )
Change subject: mb/intel/tglrvp: Enable CpuReplacementCheck ......................................................................
mb/intel/tglrvp: Enable CpuReplacementCheck
Enable CpuReplacementCheck for TGLRVP with a CPU socket.
Test=build and verified with tglrvp
Change-Id: I75b4a4609c172c341087077228e23c6d31a9e7e1 Signed-off-by: Jamie Ryu jamie.m.ryu@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/42789 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Wonkyu Kim wonkyu.kim@intel.com --- M src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb M src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb 2 files changed, 6 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Wonkyu Kim: Looks good to me, approved Jamie Ryu: Looks good to me, but someone else must approve
diff --git a/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb b/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb index 1396d3a..612a97d 100644 --- a/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb +++ b/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb @@ -32,6 +32,9 @@ register "usb3_ports[2]" = "USB3_PORT_EMPTY" # Not used register "usb3_ports[3]" = "USB3_PORT_EMPTY" # USB3/USB2 Flex Connector
+ # CPU replacement check + register "CpuReplacementCheck" = "1" + # EC host command ranges are in 0x800-0x8ff & 0x200-0x20f register "gen1_dec" = "0x00fc0801" register "gen2_dec" = "0x000c0201" diff --git a/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb b/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb index c3e41a2..7a97ad9 100644 --- a/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb +++ b/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb @@ -32,6 +32,9 @@ register "usb3_ports[2]" = "USB3_PORT_EMPTY" # Not used register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC3)" # USB3/USB2 Flex Connector
+ # CPU replacement check + register "CpuReplacementCheck" = "1" + # EC host command ranges are in 0x800-0x8ff & 0x200-0x20f register "gen1_dec" = "0x00fc0801" register "gen2_dec" = "0x000c0201"
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Jamie Ryu (Code Review) -
Patrick Georgi (Code Review)
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Wonkyu Kim (Code Review)