Attention is currently required from: Nico Huber, Jeremy Soller, Angel Pons.
Tim Crawford has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49104 )
Change subject: soc/intel/cannonlake: Allow setting PCIe subsystem IDs after FSP SiliconInit
......................................................................
Patch Set 8:
(1 comment)
File src/soc/intel/cannonlake/fsp_params.c:
https://review.coreboot.org/c/coreboot/+/49104/comment/2f4a601b_90ef48cf
PS7, Line 540: reserved1
You can omit the names for reserved fields. […]
Done. I've left it unaligned, since it looks like only AGESA code does that.
--
To view, visit
https://review.coreboot.org/c/coreboot/+/49104
To unsubscribe, or for help writing mail filters, visit
https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ieaa45ef7fa8e0da4a25b9174ded1ea0c5d9c4b4e
Gerrit-Change-Number: 49104
Gerrit-PatchSet: 8
Gerrit-Owner: Tim Crawford
tcrawford@system76.com
Gerrit-Reviewer: Felix Singer
felixsinger@posteo.net
Gerrit-Reviewer: Angel Pons
th3fanbus@gmail.com
Gerrit-Reviewer: Jeremy Soller
jeremy@system76.com
Gerrit-Reviewer: Michael Niewöhner
foss@mniewoehner.de
Gerrit-Reviewer: Nico Huber
nico.h@gmx.de
Gerrit-Reviewer: Patrick Rudolph
siro@das-labor.org
Gerrit-Reviewer: build bot (Jenkins)
no-reply@coreboot.org
Gerrit-CC: Paul Menzel
paulepanter@users.sourceforge.net
Gerrit-CC: Subrata Banik
subrata.banik@intel.com
Gerrit-Attention: Nico Huber
nico.h@gmx.de
Gerrit-Attention: Jeremy Soller
jeremy@system76.com
Gerrit-Attention: Angel Pons
th3fanbus@gmail.com
Gerrit-Comment-Date: Sat, 09 Jan 2021 00:51:50 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Comment-In-Reply-To: Angel Pons
th3fanbus@gmail.com
Gerrit-MessageType: comment