Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/34874 )
Change subject: intel/fsp_broadwell_de: Move and rename smm_lock() ......................................................................
intel/fsp_broadwell_de: Move and rename smm_lock()
There will be inlined smm_lock() that would conflict with this special case.
Change-Id: I6752cbcf4775f9c013f0b16033b40beb2c503f81 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/soc/intel/fsp_broadwell_de/cpu.c M src/soc/intel/fsp_broadwell_de/smmrelocate.c 2 files changed, 18 insertions(+), 15 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/34874/1
diff --git a/src/soc/intel/fsp_broadwell_de/cpu.c b/src/soc/intel/fsp_broadwell_de/cpu.c index db33f2e..ac4dcc9 100644 --- a/src/soc/intel/fsp_broadwell_de/cpu.c +++ b/src/soc/intel/fsp_broadwell_de/cpu.c @@ -25,8 +25,12 @@ #include <cpu/x86/mp.h> #include <cpu/x86/msr.h> #include <cpu/x86/mtrr.h> +#include <device/device.h> +#include <device/pci_ops.h> +#include <soc/lpc.h> #include <soc/msr.h> #include <soc/pattrs.h> +#include <soc/pci_devs.h> #include <soc/ramstage.h> #include <soc/smm.h>
@@ -94,6 +98,19 @@ wrmsr(IA32_PERF_CTL, perf_ctl); }
+static void alt_smm_lock(void) +{ + struct device *dev = pcidev_on_root(LPC_DEV, LPC_FUNC); + uint16_t smi_lock; + + /* There is no register to lock SMRAM region on Broadwell-DE. + Use this function to lock the SMI control bits. */ + printk(BIOS_DEBUG, "Locking SMM.\n"); + smi_lock = pci_read_config16(dev, GEN_PMCON_1); + smi_lock |= (SMI_LOCK | SMI_LOCK_GP6 | SMI_LOCK_GP22); + pci_write_config16(dev, GEN_PMCON_1, smi_lock); +} + static void post_mp_init(void) { /* Set Max Ratio */ @@ -103,7 +120,7 @@ smm_southbridge_enable_smi();
/* Set SMI lock bits. */ - smm_lock(); + alt_smm_lock(); }
static const struct mp_ops mp_ops = { diff --git a/src/soc/intel/fsp_broadwell_de/smmrelocate.c b/src/soc/intel/fsp_broadwell_de/smmrelocate.c index b0d3f14..efd42e9 100644 --- a/src/soc/intel/fsp_broadwell_de/smmrelocate.c +++ b/src/soc/intel/fsp_broadwell_de/smmrelocate.c @@ -27,7 +27,6 @@ #include <cpu/intel/smm_reloc.h> #include <console/console.h> #include <device/pci_ops.h> -#include <soc/lpc.h> #include <soc/msr.h> #include <soc/pci_devs.h> #include <soc/smm.h> @@ -305,16 +304,3 @@ else if (!boot_cpu()) smm_initiate_relocation(); } - -void smm_lock(void) -{ - pci_devfn_t dev = PCI_DEV(BUS0, LPC_DEV, LPC_FUNC); - uint16_t smi_lock; - - /* There is no register to lock SMRAM region on Broadwell-DE. - Use this function to lock the SMI control bits. */ - printk(BIOS_DEBUG, "Locking SMM.\n"); - smi_lock = pci_read_config16(dev, GEN_PMCON_1); - smi_lock |= (SMI_LOCK | SMI_LOCK_GP6 | SMI_LOCK_GP22); - pci_write_config16(dev, GEN_PMCON_1, smi_lock); -}
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34874 )
Change subject: intel/fsp_broadwell_de: Move and rename smm_lock() ......................................................................
Patch Set 4: Code-Review+2
Martin Roth has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/34874 )
Change subject: intel/fsp_broadwell_de: Move and rename smm_lock() ......................................................................
intel/fsp_broadwell_de: Move and rename smm_lock()
There will be inlined smm_lock() that would conflict with this special case.
Change-Id: I6752cbcf4775f9c013f0b16033b40beb2c503f81 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/34874 Reviewed-by: Angel Pons th3fanbus@gmail.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/soc/intel/fsp_broadwell_de/cpu.c M src/soc/intel/fsp_broadwell_de/smmrelocate.c 2 files changed, 18 insertions(+), 15 deletions(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved
diff --git a/src/soc/intel/fsp_broadwell_de/cpu.c b/src/soc/intel/fsp_broadwell_de/cpu.c index db33f2e..ac4dcc9 100644 --- a/src/soc/intel/fsp_broadwell_de/cpu.c +++ b/src/soc/intel/fsp_broadwell_de/cpu.c @@ -25,8 +25,12 @@ #include <cpu/x86/mp.h> #include <cpu/x86/msr.h> #include <cpu/x86/mtrr.h> +#include <device/device.h> +#include <device/pci_ops.h> +#include <soc/lpc.h> #include <soc/msr.h> #include <soc/pattrs.h> +#include <soc/pci_devs.h> #include <soc/ramstage.h> #include <soc/smm.h>
@@ -94,6 +98,19 @@ wrmsr(IA32_PERF_CTL, perf_ctl); }
+static void alt_smm_lock(void) +{ + struct device *dev = pcidev_on_root(LPC_DEV, LPC_FUNC); + uint16_t smi_lock; + + /* There is no register to lock SMRAM region on Broadwell-DE. + Use this function to lock the SMI control bits. */ + printk(BIOS_DEBUG, "Locking SMM.\n"); + smi_lock = pci_read_config16(dev, GEN_PMCON_1); + smi_lock |= (SMI_LOCK | SMI_LOCK_GP6 | SMI_LOCK_GP22); + pci_write_config16(dev, GEN_PMCON_1, smi_lock); +} + static void post_mp_init(void) { /* Set Max Ratio */ @@ -103,7 +120,7 @@ smm_southbridge_enable_smi();
/* Set SMI lock bits. */ - smm_lock(); + alt_smm_lock(); }
static const struct mp_ops mp_ops = { diff --git a/src/soc/intel/fsp_broadwell_de/smmrelocate.c b/src/soc/intel/fsp_broadwell_de/smmrelocate.c index b0d3f14..efd42e9 100644 --- a/src/soc/intel/fsp_broadwell_de/smmrelocate.c +++ b/src/soc/intel/fsp_broadwell_de/smmrelocate.c @@ -27,7 +27,6 @@ #include <cpu/intel/smm_reloc.h> #include <console/console.h> #include <device/pci_ops.h> -#include <soc/lpc.h> #include <soc/msr.h> #include <soc/pci_devs.h> #include <soc/smm.h> @@ -305,16 +304,3 @@ else if (!boot_cpu()) smm_initiate_relocation(); } - -void smm_lock(void) -{ - pci_devfn_t dev = PCI_DEV(BUS0, LPC_DEV, LPC_FUNC); - uint16_t smi_lock; - - /* There is no register to lock SMRAM region on Broadwell-DE. - Use this function to lock the SMI control bits. */ - printk(BIOS_DEBUG, "Locking SMM.\n"); - smi_lock = pci_read_config16(dev, GEN_PMCON_1); - smi_lock |= (SMI_LOCK | SMI_LOCK_GP6 | SMI_LOCK_GP22); - pci_write_config16(dev, GEN_PMCON_1, smi_lock); -}
-
Angel Pons (Code Review) -
Kyösti Mälkki (Code Review)
-
Martin Roth (Code Review)