Change in coreboot[master]: soc/intel/tigerlake: Do initial SoC commit

[Subrata Banik (Code Review)]

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36087 )

Change subject: soc/intel/tigerlake: Do initial SoC commit
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Patch Set 8:

(2 comments)

https://review.coreboot.org/c/coreboot/+/36087/8/src/soc/intel/tigerlake/gra... 
File src/soc/intel/tigerlake/graphics.c:

https://review.coreboot.org/c/coreboot/+/36087/8/src/soc/intel/tigerlake/gra... 
PS8, Line 73: 	 * GFX PEIM module inside FSP binary is taking care of graphics
> should depend on RUN_FSP_GOP

isn;t below code does the same check ?

if (CONFIG(INTEL_GMA_ADD_VBT))
    	return;

https://review.coreboot.org/c/coreboot/+/36087/8/src/soc/intel/tigerlake/gra... 
PS8, Line 78: 	 * In case of non-FSP solution, SoC need to select VGA_ROM_RUN
> Well, there is no VBIOS for Tiger Lake, is there? Was there one for […]

well. we do have some VBIOS as well although we preferred to use GOP