Attention is currently required from: Hung-Te Lin, Jarried Lin, Yidi Lin, Yu-Ping Wu.
Zhanzhan Ge has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/83928?usp=email )
Change subject: soc/mediatek/mt8196: Fix timer reset in BL31
......................................................................
Patch Set 23:
(4 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/83928/comment/52c10469_56a16bde?usp... :
PS21, Line 11: from
Let's rewrite these as: […]
Done
File src/soc/mediatek/mt8196/timer_prepare.c:
https://review.coreboot.org/c/coreboot/+/83928/comment/c22352bf_098794cd?usp... :
PS21, Line 18: void
u32
Done
https://review.coreboot.org/c/coreboot/+/83928/comment/5e4bfadd_023d9cc4?usp... :
PS21, Line 20: write32(cnttval_con, SYST_CON_IRQ_CLR | SYST_CON_EN);
`setbits32(cnttval_con, SYST_CON_IRQ_CLR)`
We expect to use write32 here, thank you
https://review.coreboot.org/c/coreboot/+/83928/comment/f46bcf6f_cab5219d?usp... :
PS21, Line 29: clrbits32p(SYSTIMER_BASE, COMP_FEATURE_MASK);
I'd recommend using SET32_BITFIELDS
Done
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