Attention is currently required from: Bora Guvendik, Jamie Ryu, Jérémy Compostella, Paul Menzel, Saurabh Mishra, Subrata Banik, Wonkyu Kim.
Cliff Huang has posted comments on this change by Cliff Huang. ( https://review.coreboot.org/c/coreboot/+/83981?usp=email )
Change subject: soc/intel/common/gpio: support 16-bit CPU Port ID and fix vw mapping ......................................................................
Patch Set 4:
(5 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/83981/comment/fe1ca491_8c40243b?usp... : PS4, Line 7: and vw mapping fix
Please make this a statement: […]
Acknowledged
https://review.coreboot.org/c/coreboot/+/83981/comment/693bbe26_5a180fd6?usp... : PS4, Line 9: Add Kconfig: SOC_INTEL_COMMON_BLOCK_GPIO_16BIT_CPU_PORTID. : Change cpu_port field to 16-bit width if the Kconfig is set.
Please do not break lines, just because a new sentence starts. Or format it as a list.
Acknowledged
https://review.coreboot.org/c/coreboot/+/83981/comment/2d827560_bb060e17?usp... : PS4, Line 13: vw_index and position are not continuous in between groups within a : community.
can you please point me the EDS section for understand this claim ?
I don't see these vw_index and bit position in EDS. I can provide a brief info here to help understand the existing code for vw_index and position calculation and the purpose of this CL change:
VW index bit position com0: GPP_C_00: 10h 0 <- base is 0x10 for the community ... GPP_C_07: 10h 7 GPP_C_08: 11h 0 ... GPP_C_23: 12h 7
com1: GPP_F_00: 10h 0 <- base is 0x10 for the community ... GPP_F_23: 12h 7 GPP_E_00: 13h 0 ... GPP_E_22: 15h 6
com3: GPP_A_00: 10h 0 <- base is 0x10 for the community ... GPP_A_17: 12h 1 GPP_H_00: 13h 0 <- previous positon is 1, but start from 0 ... GPP_H_24: 16h 0
com5: GPP_B_00: 10h 3 <- bit position not 0 ... GPP_B_25: 13h 1 GPP_D_00: 14h 0 <- previous position is 1, skip to start from 0 ... GPP_D_25: 17h 1
File src/soc/intel/common/block/gpio/Kconfig:
https://review.coreboot.org/c/coreboot/+/83981/comment/d186e23d_9aeac43d?usp... : PS4, Line 70: Use 16-bit CPU port ID.
please use some elaborated help text for folks to understand when to select this Kconfig.
Acknowledged
File src/soc/intel/common/block/gpio/gpio.c:
https://review.coreboot.org/c/coreboot/+/83981/comment/9b437b37_c80b5ae5?usp... : PS4, Line 1064: comm = gpio_get_community(pad);
oh. I thought I removed it. […]
Switched to your suggested code. Acknowledged