Barnali Sarkar has uploaded this change for review. ( https://review.coreboot.org/20051
Change subject: soc/intel/skylake: Moved update microcode from cbfs to pre_mp_init ......................................................................
soc/intel/skylake: Moved update microcode from cbfs to pre_mp_init
FIT is already loading microcode before CPU Reset. So, we need not update the microcode again in RO FW in bootblock.
But we need to update in RW FW if there is any new ucode version. So, added the update microcode function in pre_mp_init callback before MP Init to make sure BSP is using the microcode from cbfs.
BUG=none BRANCH=none TEST=Build and Boot poppy
Change-Id: I5606563726c00974f00285acfa435cadc90a085e Signed-off-by: Barnali Sarkar barnali.sarkar@intel.com --- M src/soc/intel/skylake/bootblock/cpu.c M src/soc/intel/skylake/cpu.c 2 files changed, 7 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/20051/1
diff --git a/src/soc/intel/skylake/bootblock/cpu.c b/src/soc/intel/skylake/bootblock/cpu.c index 78b93ad..6e21945 100644 --- a/src/soc/intel/skylake/bootblock/cpu.c +++ b/src/soc/intel/skylake/bootblock/cpu.c @@ -30,7 +30,6 @@ void bootblock_cpu_init(void) { fast_spi_cache_bios_region(); - intel_update_microcode_from_cbfs(); }
void set_max_freq(void) diff --git a/src/soc/intel/skylake/cpu.c b/src/soc/intel/skylake/cpu.c index 95d9ad9..2afb073 100644 --- a/src/soc/intel/skylake/cpu.c +++ b/src/soc/intel/skylake/cpu.c @@ -457,6 +457,12 @@ .id_table = cpu_table, };
+static void pre_mp_init(void) +{ + intel_update_microcode_from_cbfs(); + soc_fsp_load(); +} + static int get_cpu_count(void) { msr_t msr; @@ -532,7 +538,7 @@ * that are set prior to ramstage. * Real MTRRs programming are being done after resource allocation. */ - .pre_mp_init = soc_fsp_load, + .pre_mp_init = pre_mp_init, .get_cpu_count = get_cpu_count, .get_smm_info = smm_info, .get_microcode_info = get_microcode_info,