Hello Marco Chen,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/41724
to review the following change.
Change subject: mb/google/dedede: add new SPD - SPD_LPDDR4X_200b_4Gb_3733_DDP_1x16 ......................................................................
mb/google/dedede: add new SPD - SPD_LPDDR4X_200b_4Gb_3733_DDP_1x16
BUG=b:152277273 BRANCH=none TEST=build the image successfully.
Change-Id: I9910218ffa8e73ba312a006c2cf1823b24e4aaff Signed-off-by: Marco Chen marcochen@google.com --- A src/mainboard/google/dedede/spd/SPD_LPDDR4X_200b_4Gb_3733_DDP_1x16.spd.hex M src/mainboard/google/dedede/variants/waddledee/Makefile.inc M src/mainboard/google/dedede/variants/waddledoo/Makefile.inc M src/mainboard/google/dedede/variants/wheelie/Makefile.inc 4 files changed, 53 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/41724/1
diff --git a/src/mainboard/google/dedede/spd/SPD_LPDDR4X_200b_4Gb_3733_DDP_1x16.spd.hex b/src/mainboard/google/dedede/spd/SPD_LPDDR4X_200b_4Gb_3733_DDP_1x16.spd.hex new file mode 100644 index 0000000..58b6a9a --- /dev/null +++ b/src/mainboard/google/dedede/spd/SPD_LPDDR4X_200b_4Gb_3733_DDP_1x16.spd.hex @@ -0,0 +1,32 @@ +23 11 11 0E 14 19 90 08 00 00 00 00 02 22 00 00 +00 00 05 0A 80 5D 05 00 89 00 90 A8 90 A0 05 D0 +02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 FB 00 A6 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 20 00 00 00 20 20 20 20 20 20 20 +20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/src/mainboard/google/dedede/variants/waddledee/Makefile.inc b/src/mainboard/google/dedede/variants/waddledee/Makefile.inc index 922c314..a080377 100644 --- a/src/mainboard/google/dedede/variants/waddledee/Makefile.inc +++ b/src/mainboard/google/dedede/variants/waddledee/Makefile.inc @@ -2,5 +2,12 @@
SPD_SOURCES = empty #0b0000 SPD_SOURCES += SPD_LPDDR4X_200b_8Gb_4267_DDP_1x16 #0b0001 +SPD_SOURCES += empty #0b0010 +SPD_SOURCES += empty #0b0011 +SPD_SOURCES += empty #0b0100 +SPD_SOURCES += empty #0b0101 +SPD_SOURCES += empty #0b0110 +SPD_SOURCES += empty #0b0111 +SPD_SOURCES += SPD_LPDDR4X_200b_4Gb_3733_DDP_1x16 #0b1000
romstage-y += memory.c diff --git a/src/mainboard/google/dedede/variants/waddledoo/Makefile.inc b/src/mainboard/google/dedede/variants/waddledoo/Makefile.inc index 922c314..a080377 100644 --- a/src/mainboard/google/dedede/variants/waddledoo/Makefile.inc +++ b/src/mainboard/google/dedede/variants/waddledoo/Makefile.inc @@ -2,5 +2,12 @@
SPD_SOURCES = empty #0b0000 SPD_SOURCES += SPD_LPDDR4X_200b_8Gb_4267_DDP_1x16 #0b0001 +SPD_SOURCES += empty #0b0010 +SPD_SOURCES += empty #0b0011 +SPD_SOURCES += empty #0b0100 +SPD_SOURCES += empty #0b0101 +SPD_SOURCES += empty #0b0110 +SPD_SOURCES += empty #0b0111 +SPD_SOURCES += SPD_LPDDR4X_200b_4Gb_3733_DDP_1x16 #0b1000
romstage-y += memory.c diff --git a/src/mainboard/google/dedede/variants/wheelie/Makefile.inc b/src/mainboard/google/dedede/variants/wheelie/Makefile.inc index e1aeeae..7eace9c 100644 --- a/src/mainboard/google/dedede/variants/wheelie/Makefile.inc +++ b/src/mainboard/google/dedede/variants/wheelie/Makefile.inc @@ -2,3 +2,10 @@
SPD_SOURCES = empty #0b0000 SPD_SOURCES += SPD_LPDDR4X_200b_8Gb_4267_DDP_1x16 #0b0001 +SPD_SOURCES += empty #0b0010 +SPD_SOURCES += empty #0b0011 +SPD_SOURCES += empty #0b0100 +SPD_SOURCES += empty #0b0101 +SPD_SOURCES += empty #0b0110 +SPD_SOURCES += empty #0b0111 +SPD_SOURCES += SPD_LPDDR4X_200b_4Gb_3733_DDP_1x16 #0b1000
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41724 )
Change subject: mb/google/dedede: add new SPD - SPD_LPDDR4X_200b_4Gb_3733_DDP_1x16 ......................................................................
Patch Set 1:
(2 comments)
https://review.coreboot.org/c/coreboot/+/41724/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/41724/1//COMMIT_MSG@7 PS1, Line 7: mb/google/dedede: add new SPD - SPD_LPDDR4X_200b_4Gb_3733_DDP_1x16 The dash is not needed.
https://review.coreboot.org/c/coreboot/+/41724/1//COMMIT_MSG@8 PS1, Line 8: Where did you get this from or how did you generate it?
Marco Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41724 )
Change subject: mb/google/dedede: add new SPD - SPD_LPDDR4X_200b_4Gb_3733_DDP_1x16 ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/41724/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/41724/1//COMMIT_MSG@8 PS1, Line 8:
Where did you get this from or how did you generate it?
ODM team provided the SPD sheet from DRAM vendor in b:152277273.
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41724 )
Change subject: mb/google/dedede: add new SPD - SPD_LPDDR4X_200b_4Gb_3733_DDP_1x16 ......................................................................
Patch Set 1:
Quick heads up - I have some CLs uploaded for a tool that can auto-generate the SPDs - https://review.coreboot.org/c/coreboot/+/41612. I have currently checked only TGL in detail, but from a quick look, I think the tool can be used for JSL as well without any changes.
Marco Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41724 )
Change subject: mb/google/dedede: add new SPD - SPD_LPDDR4X_200b_4Gb_3733_DDP_1x16 ......................................................................
Patch Set 1:
Patch Set 1:
Quick heads up - I have some CLs uploaded for a tool that can auto-generate the SPDs - https://review.coreboot.org/c/coreboot/+/41612. I have currently checked only TGL in detail, but from a quick look, I think the tool can be used for JSL as well without any changes.
copy that
Hello build bot (Jenkins), Furquan Shaikh, Patrick Georgi, Martin Roth, Marco Chen, Karthik Ramasubramanian,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/41724
to look at the new patch set (#2).
Change subject: mb/google/dedede: add new SPD SPD_LPDDR4X_200b_4Gb_3733_DDP_1x16 ......................................................................
mb/google/dedede: add new SPD SPD_LPDDR4X_200b_4Gb_3733_DDP_1x16
BUG=b:152277273 BRANCH=none TEST=build the image successfully.
Change-Id: I9910218ffa8e73ba312a006c2cf1823b24e4aaff Signed-off-by: Marco Chen marcochen@google.com --- A src/mainboard/google/dedede/spd/SPD_LPDDR4X_200b_4Gb_3733_DDP_1x16.spd.hex M src/mainboard/google/dedede/variants/waddledee/Makefile.inc M src/mainboard/google/dedede/variants/waddledoo/Makefile.inc M src/mainboard/google/dedede/variants/wheelie/Makefile.inc 4 files changed, 53 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/41724/2
Marco Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41724 )
Change subject: mb/google/dedede: add new SPD SPD_LPDDR4X_200b_4Gb_3733_DDP_1x16 ......................................................................
Patch Set 2:
(2 comments)
https://review.coreboot.org/c/coreboot/+/41724/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/41724/1//COMMIT_MSG@7 PS1, Line 7: mb/google/dedede: add new SPD - SPD_LPDDR4X_200b_4Gb_3733_DDP_1x16
The dash is not needed.
Done
https://review.coreboot.org/c/coreboot/+/41724/1//COMMIT_MSG@8 PS1, Line 8:
ODM team provided the SPD sheet from DRAM vendor in b:152277273.
Done
Marco Chen has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/41724 )
Change subject: mb/google/dedede: add new SPD SPD_LPDDR4X_200b_4Gb_3733_DDP_1x16 ......................................................................
Abandoned
Team decides not to change the SPD index so abandon this one and migrate to new CL - https://review.coreboot.org/c/coreboot/+/41813