Change in coreboot[master]: mb/google/dedede/var/bugzzy: Configure Acoustic noise mitigation UPDs

[shkim (Code Review)]

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Hello SH Kim,

I'd like you to do a code review. Please visit

https://review.coreboot.org/c/coreboot/+/59480

to review the following change.

Change subject: mb/google/dedede/var/bugzzy: Configure Acoustic noise mitigation UPDs
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mb/google/dedede/var/bugzzy: Configure Acoustic noise mitigation UPDs

Enable Acoustic noise mitigation for bugzzy and set slew rate to 1/8
which is calibrated value for the board.

BUG=b:207046230
BRANCH=dedede
TEST=build firmware to UPD and Acoustic noise test

Signed-off-by: Seunghwan Kim 
Change-Id: Id249a143efb9bce70f48fb466fed42e766a10937
---
M src/mainboard/google/dedede/variants/bugzzy/overridetree.cb
1 file changed, 6 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/59480/1

diff --git a/src/mainboard/google/dedede/variants/bugzzy/overridetree.cb b/src/mainboard/google/dedede/variants/bugzzy/overridetree.cb
index e1318a8..de1e46d 100644
--- a/src/mainboard/google/dedede/variants/bugzzy/overridetree.cb
+++ b/src/mainboard/google/dedede/variants/bugzzy/overridetree.cb
@@ -2,6 +2,12 @@
    # MIPI display panel
    register "DdiPortAConfig" = "2" # DdiPortMipiDsi

+	# Enable Acoustic noise mitigation and set slew rate to 1/8
+	# Rest of the parameters are 0 by default.
+	register "AcousticNoiseMitigation" = "1"
+	register "SlowSlewRate" = "SlewRateFastBy8"
+	register "FastPkgCRampDisable" = "1"
+
    # Disable PCIe Root Port 8 (index 7)
    register "PcieRpEnable[7]" = "0"
    # Disable PCIe Clock Source 4 (index 3)