Michael Niewöhner has submitted this change. ( https://review.coreboot.org/c/coreboot/+/57943 )
Change subject: soc/intel/common: round PM Timer emulation frequency multiplier ......................................................................
soc/intel/common: round PM Timer emulation frequency multiplier
Round the PM Timer emulation frequency multiplier to the closest value to increase precision.
Test: compared hexdumps of CML binaries for the expected result: before: 0x262E8B51, after: 0x262E8B52
Change-Id: Iafd645c248fc17943ea4be558ed7d01a301ba809 Signed-off-by: Michael Niewöhner foss@mniewoehner.de Reviewed-on: https://review.coreboot.org/c/coreboot/+/57943 Reviewed-by: Nico Huber nico.h@gmx.de Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/soc/intel/common/block/cpu/pm_timer_emulation.c 1 file changed, 2 insertions(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved
diff --git a/src/soc/intel/common/block/cpu/pm_timer_emulation.c b/src/soc/intel/common/block/cpu/pm_timer_emulation.c index 8f56da5..0436e04 100644 --- a/src/soc/intel/common/block/cpu/pm_timer_emulation.c +++ b/src/soc/intel/common/block/cpu/pm_timer_emulation.c @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */
+#include <commonlib/helpers.h> #include <cpu/x86/msr.h> #include <intelblocks/cpulib.h> #include <intelblocks/msr.h> @@ -18,7 +19,7 @@ * (clock * msr[63:32]) >> 32 = target frequency. * Back solve the multiplier so the 3.579545MHz ACPI timer frequency is used. */ - msr.hi = (3579545ULL << 32) / CONFIG_CPU_XTAL_HZ; + msr.hi = DIV_ROUND_CLOSEST((3579545ULL << 32), CONFIG_CPU_XTAL_HZ); /* Set PM1 timer IO port and enable */ msr.lo = (EMULATE_DELAY_VALUE << EMULATE_DELAY_OFFSET_VALUE) | EMULATE_PM_TMR_EN | (ACPI_BASE_ADDRESS + PM1_TMR);
4 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one.