Naresh Solanki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/85636?usp=email )
Change subject: soc/amd/glinda/cpu: smbios: update external clock ......................................................................
soc/amd/glinda/cpu: smbios: update external clock
Change-Id: I99f73695019612d58b0c78c6985370d23c78b729 Signed-off-by: Naresh Solanki naresh.solanki@9elements.com --- M src/soc/amd/glinda/cpu.c 1 file changed, 6 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/85636/1
diff --git a/src/soc/amd/glinda/cpu.c b/src/soc/amd/glinda/cpu.c index a716127..3be2ddb 100644 --- a/src/soc/amd/glinda/cpu.c +++ b/src/soc/amd/glinda/cpu.c @@ -7,11 +7,17 @@ #include <cpu/amd/microcode.h> #include <cpu/cpu.h> #include <device/device.h> +#include <smbios.h> #include <soc/cpu.h>
_Static_assert(CONFIG_MAX_CPUS == 24, "Do not override MAX_CPUS. To reduce the number of " "available cores, use the downcore_mode and disable_smt devicetree settings instead.");
+unsigned int smbios_processor_external_clock(void) +{ + return 100; // 100 MHz +} + static void zen_2_3_init(struct device *dev) { check_mca();