[M] Change in coreboot[master]: soc/intel: Add node_num to dimm_info struct + adjust dimm_info_fill

[Jonathan Zhang (Code Review)]

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Jonathan Zhang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68525 )

Change subject: soc/intel: Add node_num to dimm_info struct + adjust dimm_info_fill
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Patch Set 4:

(1 comment)

File src/include/memory_info.h:

https://review.coreboot.org/c/coreboot/+/68525/comment/0bcf4519_e70ea6b8 
PS4, Line 96: 	 * Node-ID / Memory-Controller-ID
> Alder Lake (Client) processors have 2 memory controllers in a single socket.

Yes, similar like on the server side, the hierarchy is socket/controller/channel/DIMM.