Attention is currently required from: Arthur Heymans, Julius Werner, Jérémy Compostella, Kapil Porwal, Subrata Banik.
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81960?usp=email )
Change subject: arch/x86: Enable long mode entry into payload for x86_64 support ......................................................................
Patch Set 1:
(3 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/81960/comment/0d4afb4f_71750d00 : PS1, Line 15: transition.
When we implement the x64 architecture for libpayload, we design the ABI expectation according to long mode
So your problem is between coreboot and your payload, not "between libpayload and depthcharge"? I guess we should discuss the new ABI first.
What do you mean with LB exactly? I see you're referring to the payload?
Patchset:
PS1: I've no experience with such an ABI that involves page tables. Looking at Linux [1], it seems they expect only the minimum, kernel and all information passed should be identity mapped. Should we follow this model? or should we make more guarantees about the mapping?
Does anyone know what UPL wants to do?
[1] https://docs.kernel.org/arch/x86/boot.html?#id1
File src/arch/x86/boot.c:
https://review.coreboot.org/c/coreboot/+/81960/comment/8015c05f_7e5572ad : PS1, Line 25: if (CONFIG(PAYLOAD_X86_64_SUPPORT)) {
AIUI, the payload handover and the coreboot tables are the most important […]
Would it be possible to make it an offset? Then we could have a 32-bit entry point followed by a 64-bit one, and a coreboot that knows the new ABI could skip the first and jump directly to the new entry point. This would allow the most compatibility between coreboot and payloads, as we could say the 64-bit entry point is optional on both ends (except for X86S, ofc.).
I guess the complexity of such a 32-bit entry point, that switches to long mode, would depend a lot on the expectations on page tables in the new ABI.