Martin L Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/69391 )
(
2 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: google/chromeec: Add ACPI method for EC Panic ......................................................................
google/chromeec: Add ACPI method for EC Panic
Add an ACPI method to handle EC_HOST_EVENT_PANIC (bit 24) events.
EC panic is not covered by the standard (0-F) ACPI notify values. Arbitrarily choosing B0 notify, which is in the 84-BF device specific ACPI notify range.
This will be a no-op until the kernel driver is also updated to handle this event.
BUG=b:258195448 BRANCH=None TEST=Observe event with modified cros_ec_lpc driver
Signed-off-by: Rob Barnes robbarnes@google.com Change-Id: Iafa642c1c50f9a0083a8e618e1eabec9a7ce39b4 Reviewed-on: https://review.coreboot.org/c/coreboot/+/69391 Reviewed-by: Raul Rangel rrangel@chromium.org Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/ec/google/chromeec/acpi/ec.asl 1 file changed, 35 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Raul Rangel: Looks good to me, approved
diff --git a/src/ec/google/chromeec/acpi/ec.asl b/src/ec/google/chromeec/acpi/ec.asl index 3200902..e4637b3 100644 --- a/src/ec/google/chromeec/acpi/ec.asl +++ b/src/ec/google/chromeec/acpi/ec.asl @@ -12,6 +12,8 @@ #define EC_OEM_VARIABLE_DATA_MASK 0x7 #define INT3400_ODVP_CHANGED 0x88
+#define ACPI_NOTIFY_CROS_EC_PANIC 0xB0 + // Mainboard specific throttle handler #ifdef DPTF_ENABLE_CHARGER External (_SB.DPTF.TCHG, DeviceObj) @@ -409,6 +411,13 @@ \PNOT () }
+ // EC Panic + Method (_Q18, 0, NotSerialized) + { + Printf ("EC: PANIC") + Notify (CREC, ACPI_NOTIFY_CROS_EC_PANIC) + } + // MKBP interrupt. Method (_Q1B, 0, NotSerialized) {