[XS] Change in coreboot[main]: lotso: Update board type to BOARD_TYPE_ULT_ULX

[Kun Liu (Code Review)]

Kun Liu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/83191?usp=email )

Change subject: lotso: Update board type to BOARD_TYPE_ULT_ULX
......................................................................

lotso: Update board type to BOARD_TYPE_ULT_ULX

Update board type to BOARD_TYPE_ULT_ULX

BUG=b:348147663
BRANCH=none
TEST=Built and compare the results of command 'dmidecode --type 17 | grep Speed'

[Before]
  Speed: 8400 MT/s
  Configured Memory Speed: 6400 MT/s
[After]
  Speed: 8400 MT/s
  Configured Memory Speed: 5200 MT/s

Change-Id: I049d7c19424f41e83480f4b80bafd6ef8b9e30f6
Signed-off-by: Kun Liu 
---
M src/mainboard/google/brox/variants/lotso/memory.c
1 file changed, 3 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/83191/1

diff --git a/src/mainboard/google/brox/variants/lotso/memory.c b/src/mainboard/google/brox/variants/lotso/memory.c
index 0765d5e..84b9f4a 100644
--- a/src/mainboard/google/brox/variants/lotso/memory.c
+++ b/src/mainboard/google/brox/variants/lotso/memory.c
@@ -3,6 +3,7 @@
 #include <baseboard/gpio.h>
 #include <baseboard/variants.h>
 #include <gpio.h>
+#include <soc/romstage.h>

static const struct mb_cfg baseboard_memcfg = {
    .type = MEM_TYPE_LP5X,
@@ -64,6 +65,8 @@
    .LpDdrDqDqsReTraining = 1,

.ect = 1, /* Early Command Training */
+
+	.UserBd = BOARD_TYPE_ULT_ULX,
 };

const struct mb_cfg *variant_memory_params(void)