Raul Rangel has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41901 )
Change subject: soc/amd/picasso: Switch to using xhci common block ......................................................................
soc/amd/picasso: Switch to using xhci common block
BUG=b:154756391 TEST=Boot trembyle and look at ACPI table
Signed-off-by: Raul E Rangel rrangel@chromium.org Change-Id: I3e9973dd416ccd51971f4d9410bed991eb7c3c41 --- M src/soc/amd/picasso/Kconfig M src/soc/amd/picasso/Makefile.inc M src/soc/amd/picasso/acpi/sb_pci0_fch.asl D src/soc/amd/picasso/acpi/usb.asl D src/soc/amd/picasso/usb.c 5 files changed, 1 insertion(+), 102 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/41901/1
diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig index ddbc6c3..0b17c25 100644 --- a/src/soc/amd/picasso/Kconfig +++ b/src/soc/amd/picasso/Kconfig @@ -40,6 +40,7 @@ select SOC_AMD_COMMON_BLOCK_SATA select SOC_AMD_COMMON_BLOCK_SMBUS select SOC_AMD_COMMON_BLOCK_PSP_GEN2 + select SOC_AMD_COMMON_BLOCK_XHCI select PROVIDES_ROM_SHARING select BOOT_DEVICE_SUPPORTS_WRITES if BOOT_DEVICE_SPI_FLASH select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH diff --git a/src/soc/amd/picasso/Makefile.inc b/src/soc/amd/picasso/Makefile.inc index d0046ea..d1ff319 100644 --- a/src/soc/amd/picasso/Makefile.inc +++ b/src/soc/amd/picasso/Makefile.inc @@ -56,7 +56,6 @@ ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi_util.c ramstage-$(CONFIG_PICASSO_UART) += uart.c -ramstage-y += usb.c ramstage-y += tsc_freq.c ramstage-y += finalize.c ramstage-y += soc_util.c diff --git a/src/soc/amd/picasso/acpi/sb_pci0_fch.asl b/src/soc/amd/picasso/acpi/sb_pci0_fch.asl index 751c178..c7c424f 100644 --- a/src/soc/amd/picasso/acpi/sb_pci0_fch.asl +++ b/src/soc/amd/picasso/acpi/sb_pci0_fch.asl @@ -27,8 +27,6 @@ Name(_ADR, 0x00140000) } /* end SBUS */
-#include "usb.asl" - /* 0:14.2 - I2S Audio */
/* 0:14.3 - LPC */ diff --git a/src/soc/amd/picasso/acpi/usb.asl b/src/soc/amd/picasso/acpi/usb.asl deleted file mode 100644 index f902100..0000000 --- a/src/soc/amd/picasso/acpi/usb.asl +++ /dev/null @@ -1,53 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -/* 0:12.0 - EHCI */ -Device(EHC0) { - Name(_ADR, 0x00120000) - Name(_PRW, Package() { 0xb, 3 }) - Device (RHUB) { - Name (_ADR, Zero) - Device (HS01) { Name (_ADR, 1) } - Device (HS02) { Name (_ADR, 2) } - Device (HS03) { Name (_ADR, 3) } - Device (HS04) { Name (_ADR, 4) } - Device (HS05) { Name (_ADR, 5) } - Device (HS06) { Name (_ADR, 6) } - Device (HS07) { Name (_ADR, 7) } - Device (HS08) { Name (_ADR, 8) } - } - - Method(_S0W,0) { - Return(0) - } - - Method(_S3W,0) { - Return(4) - } - - Method(_S4W,0) { - Return(4) - } -} /* end EHC0 */ - - -/* 0:10.0 - XHCI 0*/ -Device(XHC0) { - Name(_ADR, 0x00100000) - Name(_PRW, Package() { 0xb, 3 }) - Device (SS01) { Name (_ADR, 1) } - Device (SS02) { Name (_ADR, 2) } - Device (SS03) { Name (_ADR, 3) } - - Method(_S0W,0) { - Return(0) - } - - Method(_S3W,0) { - Return(4) - } - - Method(_S4W,0) { - Return(4) - } - -} /* end XHC0 */ diff --git a/src/soc/amd/picasso/usb.c b/src/soc/amd/picasso/usb.c deleted file mode 100644 index a507956..0000000 --- a/src/soc/amd/picasso/usb.c +++ /dev/null @@ -1,46 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <console/console.h> -#include <device/device.h> -#include <device/pci.h> -#include <device/pci_ids.h> -#include <device/pci_ops.h> -#include <device/pci_ehci.h> -#include <soc/acpi.h> -#include <soc/pci_devs.h> -#include <soc/southbridge.h> -#include <amdblocks/acpimmio.h> - -static void picasso_usb_init(struct device *dev) -{ - /* USB overcurrent configuration is programmed inside the FSP */ - - printk(BIOS_DEBUG, "%s\n", __func__); -} - -static struct pci_operations lops_pci = { - .set_subsystem = pci_dev_set_subsystem, -}; - -static struct device_operations usb_ops = { - .read_resources = pci_dev_read_resources, - .set_resources = pci_dev_set_resources, - .enable_resources = pci_dev_enable_resources, - .init = picasso_usb_init, - .scan_bus = scan_static_bus, - .acpi_name = soc_acpi_name, - .ops_pci = &lops_pci, -}; - -static const unsigned short pci_device_ids[] = { - PCI_DEVICE_ID_AMD_FAM17H_MODEL18H_XHCI0, - PCI_DEVICE_ID_AMD_FAM17H_MODEL18H_XHCI1, - PCI_DEVICE_ID_AMD_FAM17H_MODEL20H_XHCI0, - 0 -}; - -static const struct pci_driver usb_0_driver __pci_driver = { - .ops = &usb_ops, - .vendor = PCI_VENDOR_ID_AMD, - .devices = pci_device_ids, -};
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41901 )
Change subject: soc/amd/picasso: Switch to using xhci common block ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/41901/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/41901/1//COMMIT_MSG@8 PS1, Line 8: Is the generated code different?
Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41901 )
Change subject: soc/amd/picasso: Switch to using xhci common block ......................................................................
Uploaded patch set 2.
(1 comment)
https://review.coreboot.org/c/coreboot/+/41901/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/41901/1//COMMIT_MSG@8 PS1, Line 8:
Is the generated code different?
This code was wrong, so the generated code actually works as expected.
Hello build bot (Jenkins), Furquan Shaikh, Patrick Georgi, Martin Roth, Aaron Durbin, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/41901
to look at the new patch set (#2).
Change subject: soc/amd/picasso: Switch to using xhci common block ......................................................................
soc/amd/picasso: Switch to using xhci common block
BUG=b:154756391 TEST=Boot trembyle and look at ACPI table
Signed-off-by: Raul E Rangel rrangel@chromium.org Change-Id: I3e9973dd416ccd51971f4d9410bed991eb7c3c41 --- M src/soc/amd/picasso/Kconfig M src/soc/amd/picasso/Makefile.inc M src/soc/amd/picasso/acpi/sb_pci0_fch.asl D src/soc/amd/picasso/acpi/usb.asl A src/soc/amd/picasso/include/soc/xhci.h D src/soc/amd/picasso/usb.c 6 files changed, 11 insertions(+), 102 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/41901/2
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41901 )
Change subject: soc/amd/picasso: Switch to using xhci common block ......................................................................
Patch Set 2: Code-Review+1
We should also move acpi_name support for USB controllers and ports to common/blocks/xhci.
Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41901 )
Change subject: soc/amd/picasso: Delete partially implemented usb implementation ......................................................................
Uploaded patch set 3.
Hello build bot (Jenkins), Furquan Shaikh, Patrick Georgi, Martin Roth, Aaron Durbin, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/41901
to look at the new patch set (#3).
Change subject: soc/amd/picasso: Delete partially implemented usb implementation ......................................................................
soc/amd/picasso: Delete partially implemented usb implementation
There is now a generic xhci driver we can use to generate the xHCI ACPI nodes.
BUG=b:154756391 TEST=Boot trembyle and look at ACPI table
Signed-off-by: Raul E Rangel rrangel@chromium.org Change-Id: I3e9973dd416ccd51971f4d9410bed991eb7c3c41 --- M src/soc/amd/picasso/Makefile.inc M src/soc/amd/picasso/acpi/sb_pci0_fch.asl D src/soc/amd/picasso/acpi/usb.asl M src/soc/amd/picasso/chip.c D src/soc/amd/picasso/usb.c 5 files changed, 0 insertions(+), 119 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/41901/3
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41901 )
Change subject: soc/amd/picasso: Delete partially implemented usb implementation ......................................................................
Patch Set 3: Code-Review+2
Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41901 )
Change subject: soc/amd/picasso: Delete partially implemented usb implementation ......................................................................
Uploaded patch set 4: Patch Set 3 was rebased.
Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41901 )
Change subject: soc/amd/picasso: Delete partially implemented usb implementation ......................................................................
Uploaded patch set 5.
Hello build bot (Jenkins), Furquan Shaikh, Patrick Georgi, Martin Roth, Aaron Durbin, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/41901
to look at the new patch set (#5).
Change subject: soc/amd/picasso: Delete partially implemented usb implementation ......................................................................
soc/amd/picasso: Delete partially implemented usb implementation
There is now a generic xhci driver we can use to generate the xHCI ACPI nodes.
BUG=b:154756391 TEST=Boot trembyle and look at ACPI table
Signed-off-by: Raul E Rangel rrangel@chromium.org Change-Id: I3e9973dd416ccd51971f4d9410bed991eb7c3c41 --- M src/soc/amd/picasso/Makefile.inc M src/soc/amd/picasso/acpi/sb_pci0_fch.asl D src/soc/amd/picasso/acpi/usb.asl M src/soc/amd/picasso/chip.c D src/soc/amd/picasso/usb.c 5 files changed, 0 insertions(+), 129 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/41901/5
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41901 )
Change subject: soc/amd/picasso: Delete partially implemented usb implementation ......................................................................
Patch Set 5: Code-Review+2
Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41901 )
Change subject: soc/amd/picasso: Delete partially implemented usb implementation ......................................................................
Uploaded patch set 6: Patch Set 5 was rebased.
Hello build bot (Jenkins), Furquan Shaikh, Patrick Georgi, Martin Roth, Aaron Durbin, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/41901
to look at the new patch set (#7).
Change subject: soc/amd/picasso: Delete partially implemented usb implementation ......................................................................
soc/amd/picasso: Delete partially implemented usb implementation
There is now a generic xhci driver we can use to generate the xHCI ACPI nodes.
BUG=b:154756391 TEST=Boot trembyle and look at ACPI table
Signed-off-by: Raul E Rangel rrangel@chromium.org Change-Id: I3e9973dd416ccd51971f4d9410bed991eb7c3c41 --- M src/soc/amd/picasso/Makefile.inc M src/soc/amd/picasso/acpi/sb_pci0_fch.asl D src/soc/amd/picasso/acpi/usb.asl M src/soc/amd/picasso/chip.c D src/soc/amd/picasso/usb.c 5 files changed, 0 insertions(+), 129 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/41901/7
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41901 )
Change subject: soc/amd/picasso: Delete partially implemented usb implementation ......................................................................
Patch Set 7: Code-Review+2
Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/41901 )
Change subject: soc/amd/picasso: Delete partially implemented usb implementation ......................................................................
soc/amd/picasso: Delete partially implemented usb implementation
There is now a generic xhci driver we can use to generate the xHCI ACPI nodes.
BUG=b:154756391 TEST=Boot trembyle and look at ACPI table
Signed-off-by: Raul E Rangel rrangel@chromium.org Change-Id: I3e9973dd416ccd51971f4d9410bed991eb7c3c41 Reviewed-on: https://review.coreboot.org/c/coreboot/+/41901 Reviewed-by: Furquan Shaikh furquan@google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/soc/amd/picasso/Makefile.inc M src/soc/amd/picasso/acpi/sb_pci0_fch.asl D src/soc/amd/picasso/acpi/usb.asl M src/soc/amd/picasso/chip.c D src/soc/amd/picasso/usb.c 5 files changed, 0 insertions(+), 129 deletions(-)
Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved
diff --git a/src/soc/amd/picasso/Makefile.inc b/src/soc/amd/picasso/Makefile.inc index d19402f..203adb5 100644 --- a/src/soc/amd/picasso/Makefile.inc +++ b/src/soc/amd/picasso/Makefile.inc @@ -69,7 +69,6 @@ ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi_util.c ramstage-y += uart.c ramstage-$(CONFIG_PICASSO_CONSOLE_UART) += uart_console.c -ramstage-y += usb.c ramstage-y += tsc_freq.c ramstage-y += finalize.c ramstage-y += soc_util.c diff --git a/src/soc/amd/picasso/acpi/sb_pci0_fch.asl b/src/soc/amd/picasso/acpi/sb_pci0_fch.asl index 7488b55..88d941f 100644 --- a/src/soc/amd/picasso/acpi/sb_pci0_fch.asl +++ b/src/soc/amd/picasso/acpi/sb_pci0_fch.asl @@ -27,8 +27,6 @@ Name(_ADR, 0x00140000) } /* end SBUS */
-#include "usb.asl" - /* 0:14.2 - I2S Audio */
/* 0:14.3 - LPC */ diff --git a/src/soc/amd/picasso/acpi/usb.asl b/src/soc/amd/picasso/acpi/usb.asl deleted file mode 100644 index f902100..0000000 --- a/src/soc/amd/picasso/acpi/usb.asl +++ /dev/null @@ -1,53 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -/* 0:12.0 - EHCI */ -Device(EHC0) { - Name(_ADR, 0x00120000) - Name(_PRW, Package() { 0xb, 3 }) - Device (RHUB) { - Name (_ADR, Zero) - Device (HS01) { Name (_ADR, 1) } - Device (HS02) { Name (_ADR, 2) } - Device (HS03) { Name (_ADR, 3) } - Device (HS04) { Name (_ADR, 4) } - Device (HS05) { Name (_ADR, 5) } - Device (HS06) { Name (_ADR, 6) } - Device (HS07) { Name (_ADR, 7) } - Device (HS08) { Name (_ADR, 8) } - } - - Method(_S0W,0) { - Return(0) - } - - Method(_S3W,0) { - Return(4) - } - - Method(_S4W,0) { - Return(4) - } -} /* end EHC0 */ - - -/* 0:10.0 - XHCI 0*/ -Device(XHC0) { - Name(_ADR, 0x00100000) - Name(_PRW, Package() { 0xb, 3 }) - Device (SS01) { Name (_ADR, 1) } - Device (SS02) { Name (_ADR, 2) } - Device (SS03) { Name (_ADR, 3) } - - Method(_S0W,0) { - Return(0) - } - - Method(_S3W,0) { - Return(4) - } - - Method(_S4W,0) { - Return(4) - } - -} /* end XHC0 */ diff --git a/src/soc/amd/picasso/chip.c b/src/soc/amd/picasso/chip.c index 7d56323..8384541 100644 --- a/src/soc/amd/picasso/chip.c +++ b/src/soc/amd/picasso/chip.c @@ -30,23 +30,6 @@ if (dev->path.type == DEVICE_PATH_DOMAIN) return "PCI0";
- if (dev->path.type == DEVICE_PATH_USB) { - switch (dev->path.usb.port_type) { - case 0: - /* Root Hub */ - return "RHUB"; - case 3: - /* USB3 ports */ - switch (dev->path.usb.port_id) { - case 0: return "SS01"; - case 1: return "SS02"; - case 2: return "SS03"; - } - break; - } - return NULL; - } - if (dev->path.type != DEVICE_PATH_PCI) return NULL;
@@ -67,20 +50,6 @@ } }
- if (dev->bus->dev->path.type == DEVICE_PATH_PCI - && dev->bus->dev->path.pci.devfn == PCIE_GPP_A_DEVFN) { - switch (dev->path.pci.devfn) { - case XHCI0_DEVFN: - return "XHC0"; - case XHCI1_DEVFN: - return "XHC1"; - default: - printk(BIOS_WARNING, "Unknown Bus A PCI device: dev: %d, fn: %d\n", - PCI_SLOT(dev->path.pci.devfn), PCI_FUNC(dev->path.pci.devfn)); - return NULL; - } - } - printk(BIOS_WARNING, "Unknown PCI device: dev: %d, fn: %d\n", PCI_SLOT(dev->path.pci.devfn), PCI_FUNC(dev->path.pci.devfn)); return NULL; diff --git a/src/soc/amd/picasso/usb.c b/src/soc/amd/picasso/usb.c deleted file mode 100644 index 7b8c18c..0000000 --- a/src/soc/amd/picasso/usb.c +++ /dev/null @@ -1,42 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <console/console.h> -#include <device/device.h> -#include <device/pci.h> -#include <device/pci_ids.h> -#include <device/pci_ops.h> -#include <device/pci_ehci.h> -#include <soc/acpi.h> -#include <soc/pci_devs.h> -#include <soc/southbridge.h> -#include <amdblocks/acpimmio.h> - -static void picasso_usb_init(struct device *dev) -{ - /* USB overcurrent configuration is programmed inside the FSP */ - - printk(BIOS_DEBUG, "%s\n", __func__); -} - -static struct device_operations usb_ops = { - .read_resources = pci_dev_read_resources, - .set_resources = pci_dev_set_resources, - .enable_resources = pci_dev_enable_resources, - .init = picasso_usb_init, - .scan_bus = scan_static_bus, - .acpi_name = soc_acpi_name, - .ops_pci = &pci_dev_ops_pci, -}; - -static const unsigned short pci_device_ids[] = { - PCI_DEVICE_ID_AMD_FAM17H_MODEL18H_XHCI0, - PCI_DEVICE_ID_AMD_FAM17H_MODEL18H_XHCI1, - PCI_DEVICE_ID_AMD_FAM17H_MODEL20H_XHCI0, - 0 -}; - -static const struct pci_driver usb_0_driver __pci_driver = { - .ops = &usb_ops, - .vendor = PCI_VENDOR_ID_AMD, - .devices = pci_device_ids, -};
-
Felix Held (Code Review) -
Furquan Shaikh (Code Review)
-
Paul Menzel (Code Review)
-
Raul Rangel (Code Review)