[XL] Change in coreboot[main]: soc/intel/snowridge: Add support for Intel Atom Snow Ridge SoC

[Shuo Liu (Code Review)]

Attention is currently required from: Elyes Haouas, Felix Singer, Jérémy Compostella, Vasiliy Khoruzhick, [e-mail].

Shuo Liu has posted comments on this change by [e-mail]. ( https://review.coreboot.org/c/coreboot/+/83321?usp=email )

Change subject: soc/intel/snowridge: Add support for Intel Atom Snow Ridge SoC
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Patch Set 15:

(10 comments)

File src/soc/intel/snowridge/Kconfig:

https://review.coreboot.org/c/coreboot/+/83321/comment/3eb68f2c_d73a7a18?usp... :
PS15, Line 42: 	select FSP_T_XIP
Should FSP_S_XIP be selected as well?

https://review.coreboot.org/c/coreboot/+/83321/comment/37f641fe_d9ee440f?usp... :
PS15, Line 123: 	default 0x3ff00 if FSP_CAR
Are FSP_CAR and !FSP_CAR both validated?

https://review.coreboot.org/c/coreboot/+/83321/comment/a41daac6_ed51c2df?usp... :
PS15, Line 244: 	  0xfe00000. It will be used until coreboot resource allocation overwrite it
0xfe000000?

File src/soc/intel/snowridge/Makefile.mk:

https://review.coreboot.org/c/coreboot/+/83321/comment/82ebec05_65ba309b?usp... :
PS15, Line 60: endif ## CONFIG_SOC_INTEL_FSP_SNOWRIDGE
CONFIG_SOC_INTEL_SNOWRIDGE

File src/soc/intel/snowridge/chip.h:

https://review.coreboot.org/c/coreboot/+/83321/comment/06f3c18a_52a2d278?usp... :
PS15, Line 12:  * additional root bus in stack 2 and 7 (UBox1).
So what is for stack 2?

File src/soc/intel/snowridge/chip.c:

https://review.coreboot.org/c/coreboot/+/83321/comment/0caa4002_0b24f221?usp... :
PS15, Line 55: 	const BL_IIO_UDS *hob;
Could you please follow C99 practice that declaring variable when using?

https://review.coreboot.org/c/coreboot/+/83321/comment/3b0a1615_bf2cdb36?usp... :
PS15, Line 75: 		if (sr[i].Personality >= BL_TYPE_DISABLED)
is there any reason not using !=?

https://review.coreboot.org/c/coreboot/+/83321/comment/d07132e2_1fcdda2e?usp... :
PS15, Line 180: 	int i;
for (int i = 0; ...)

File src/soc/intel/snowridge/systemagent.c:

https://review.coreboot.org/c/coreboot/+/83321/comment/3992c000_6f93598d?usp... :
PS15, Line 17: 	*size = CONFIG_ECAM_MMCONF_LENGTH;
Shouldn't be probed by BAR access?

https://review.coreboot.org/c/coreboot/+/83321/comment/a4616d7b_e875dace?usp... :
PS15, Line 33: {
The resource_cnt is a bit confusing, is there cases where resource_cnt != 1?