Change in coreboot[master]: soc/intel/tigerlake: Send End-of-Post message to CSE - coreboot-gerrit

30 Jun 2021


      Attention is currently required from: Furquan Shaikh, Patrick Rudolph.
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55632 )
Change subject: soc/intel/tigerlake: Send End-of-Post message to CSE
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Patch Set 10:
(1 comment)
File src/soc/intel/tigerlake/fsp_params.c:
https://review.coreboot.org/c/coreboot/+/55632/comment/dcbe1586_cb434f40 
PS2, Line 201: /* Enable End of Post in PEI phase */
...
Comment needs update.
Done
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Iae6b2eac11c065749e57c5337d81ed20044fc903
Gerrit-Change-Number: 55632
Gerrit-PatchSet: 10
Gerrit-Owner: Tim Wawrzynczak twawrzynczak@chromium.org
Gerrit-Reviewer: Furquan Shaikh furquan@google.com
Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org
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