Attention is currently required from: Furquan Shaikh, Martin Roth, Marshall Dawson, Andrey Petrov, Patrick Rudolph. Nikolai Vyssotski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56190 )
Change subject: src/drivers/intel/fsp2_0: allow larger FSP 2.0 header ......................................................................
Patch Set 2:
(1 comment)
File src/drivers/intel/fsp2_0/include/fsp/info_header.h:
https://review.coreboot.org/c/coreboot/+/56190/comment/e843aed2_22e9f7a3 PS2, Line 13: however, some FSP 2.0 variants have it as well.
Then it is not conforming to FSP specification: […]
I agree with you. I prefer it not going into coreboot either. Martin and I discussed this in great detail. It does violate Intel's FSP 2.0 spec - this is what I tried to highlight in the comment. However the fact remains - the current implementations of FSP 2.0 header in edk2 have FspMultiPhaseSiInitEntryOffset field in there (see https://github.com/tianocore/edk2/blob/master/IntelFsp2Pkg/Include/Guid/FspH... and https://bugzilla.tianocore.org/show_bug.cgi?id=2698). It is not only in FSP 2.2 but also in FSP 2.0 header now (since commit f2cdb268 by hasel.chiu@intel.com on Apr 30 2020). FSP version supported by edk2 is defined in IntelFsp2Pkg/IntelFsp2Pkg.dec by PcdFspHeaderSpecVersion, which is still at 0x20 or FSP 2.0. If we want to upgrade from UDK2018 to anything more recent than stable202005 we will need to accommodate it in coreboot. The other option is to override this header file during FSP build but per discussion with Martin it seems to be a less desirable approach.
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Nikolai Vyssotski (Code Review)