Sridhar Siricilla has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/62904 )
Change subject: mb/google/brya: Deselect ALDERLAKE_A0_CONFIGURE_PMC_DESCRIPTOR ......................................................................
mb/google/brya: Deselect ALDERLAKE_A0_CONFIGURE_PMC_DESCRIPTOR
The patch deselects ALDERLAKE_A0_CONFIGURE_PMC_DESCRIPTOR Kconfig which updates PMC settings in the IFD for Alder Lake A0 silicon. As Alder Lake A0 is intermediate stepping, and the IFD is locked in the production systems, so the Kconfig is deselected.
BUG=b:190588098 TEST=Build the coreboot for Gimble
Signed-off-by: Sridhar Siricilla sridhar.siricilla@intel.com Change-Id: I81fe7c792dd82d9d547d318ebda55ee4a0f3ac96 --- M src/mainboard/google/brya/Kconfig 1 file changed, 0 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/62904/1
diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig index 1d29b6f..199db11 100644 --- a/src/mainboard/google/brya/Kconfig +++ b/src/mainboard/google/brya/Kconfig @@ -1,6 +1,5 @@ config BOARD_GOOGLE_BRYA_COMMON def_bool n - select ALDERLAKE_A0_CONFIGURE_PMC_DESCRIPTOR select BOARD_ROMSIZE_KB_32768 select CR50_USE_LONG_INTERRUPT_PULSES select DRIVERS_GENERIC_ALC1015