Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/43476 )
Change subject: mb/google/zork: Move variant_pcie_gpio_configure() to bootblock ......................................................................
mb/google/zork: Move variant_pcie_gpio_configure() to bootblock
On zork, bootblock is part of RW firmware in non-recovery mode, so PCIe GPIOs can be configured early on in bootblock rather than waiting until romstage. This change moves the call to variant_pcie_gpio_configure() to happen in bootblock and drops romstage.c file.
BUG=b:154351731
Signed-off-by: Furquan Shaikh furquan@google.com Change-Id: Ic515304f35fe5623d58d6000efcb11fb9039e137 --- M src/mainboard/google/zork/bootblock.c D src/mainboard/google/zork/romstage.c 2 files changed, 2 insertions(+), 11 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/76/43476/1
diff --git a/src/mainboard/google/zork/bootblock.c b/src/mainboard/google/zork/bootblock.c index 11391ef..a7636de 100644 --- a/src/mainboard/google/zork/bootblock.c +++ b/src/mainboard/google/zork/bootblock.c @@ -12,4 +12,6 @@ gpios = variant_early_gpio_table(&num_gpios); program_gpios(gpios, num_gpios); } + + variant_pcie_gpio_configure(); } diff --git a/src/mainboard/google/zork/romstage.c b/src/mainboard/google/zork/romstage.c deleted file mode 100644 index 39f23cf..0000000 --- a/src/mainboard/google/zork/romstage.c +++ /dev/null @@ -1,11 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ - -#include <baseboard/variants.h> -#include <soc/gpio.h> -#include <soc/romstage.h> -#include <console/console.h> - -void mainboard_romstage_entry_s3(int s3_resume) -{ - variant_pcie_gpio_configure(); -}
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43476 )
Change subject: mb/google/zork: Move variant_pcie_gpio_configure() to bootblock ......................................................................
Patch Set 1: Code-Review+1
(1 comment)
https://review.coreboot.org/c/coreboot/+/43476/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/43476/1//COMMIT_MSG@9 PS1, Line 9: On zork, bootblock is part of RW firmware in non-recovery mode, so : PCIe GPIOs can be configured early on in bootblock rather than waiting : until romstage. This change moves the call to : variant_pcie_gpio_configure() to happen in bootblock and drops : romstage.c file. Please re-flow for 75 characters per line.
Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43476 )
Change subject: mb/google/zork: Move variant_pcie_gpio_configure() to bootblock ......................................................................
Patch Set 1: Code-Review+2
Hello build bot (Jenkins), Paul Menzel, Aaron Durbin,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/43476
to look at the new patch set (#3).
Change subject: mb/google/zork: Move variant_pcie_gpio_configure() to bootblock ......................................................................
mb/google/zork: Move variant_pcie_gpio_configure() to bootblock
On zork, bootblock is part of RW firmware in non-recovery mode, so PCIe GPIOs can be configured early on in bootblock rather than waiting until romstage. This change moves the call to variant_pcie_gpio_configure() to happen in bootblock and drops romstage.c file.
BUG=b:154351731
Signed-off-by: Furquan Shaikh furquan@google.com Change-Id: Ic515304f35fe5623d58d6000efcb11fb9039e137 --- M src/mainboard/google/zork/bootblock.c D src/mainboard/google/zork/romstage.c 2 files changed, 2 insertions(+), 11 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/76/43476/3
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43476 )
Change subject: mb/google/zork: Move variant_pcie_gpio_configure() to bootblock ......................................................................
Patch Set 3:
(1 comment)
https://review.coreboot.org/c/coreboot/+/43476/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/43476/1//COMMIT_MSG@9 PS1, Line 9: On zork, bootblock is part of RW firmware in non-recovery mode, so : PCIe GPIOs can be configured early on in bootblock rather than waiting : until romstage. This change moves the call to : variant_pcie_gpio_configure() to happen in bootblock and drops : romstage.c file.
Please re-flow for 75 characters per line.
Done
Hello build bot (Jenkins), Paul Menzel, Aaron Durbin,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/43476
to look at the new patch set (#4).
Change subject: mb/google/zork: Move variant_pcie_gpio_configure() to bootblock ......................................................................
mb/google/zork: Move variant_pcie_gpio_configure() to bootblock
On zork, bootblock is part of RW firmware in non-recovery mode, so PCIe GPIOs can be configured early on in bootblock rather than waiting until romstage. This change moves the call to variant_pcie_gpio_configure() to happen in bootblock and drops romstage.c file.
BUG=b:154351731
Signed-off-by: Furquan Shaikh furquan@google.com Change-Id: Ic515304f35fe5623d58d6000efcb11fb9039e137 --- M src/mainboard/google/zork/bootblock.c D src/mainboard/google/zork/romstage.c 2 files changed, 2 insertions(+), 11 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/76/43476/4
Aaron Durbin has submitted this change. ( https://review.coreboot.org/c/coreboot/+/43476 )
Change subject: mb/google/zork: Move variant_pcie_gpio_configure() to bootblock ......................................................................
mb/google/zork: Move variant_pcie_gpio_configure() to bootblock
On zork, bootblock is part of RW firmware in non-recovery mode, so PCIe GPIOs can be configured early on in bootblock rather than waiting until romstage. This change moves the call to variant_pcie_gpio_configure() to happen in bootblock and drops romstage.c file.
BUG=b:154351731
Signed-off-by: Furquan Shaikh furquan@google.com Change-Id: Ic515304f35fe5623d58d6000efcb11fb9039e137 Reviewed-on: https://review.coreboot.org/c/coreboot/+/43476 Reviewed-by: Paul Menzel paulepanter@users.sourceforge.net Reviewed-by: Aaron Durbin adurbin@chromium.org Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/google/zork/bootblock.c D src/mainboard/google/zork/romstage.c 2 files changed, 2 insertions(+), 11 deletions(-)
Approvals: build bot (Jenkins): Verified Paul Menzel: Looks good to me, but someone else must approve Aaron Durbin: Looks good to me, approved
diff --git a/src/mainboard/google/zork/bootblock.c b/src/mainboard/google/zork/bootblock.c index 11391ef..a7636de 100644 --- a/src/mainboard/google/zork/bootblock.c +++ b/src/mainboard/google/zork/bootblock.c @@ -12,4 +12,6 @@ gpios = variant_early_gpio_table(&num_gpios); program_gpios(gpios, num_gpios); } + + variant_pcie_gpio_configure(); } diff --git a/src/mainboard/google/zork/romstage.c b/src/mainboard/google/zork/romstage.c deleted file mode 100644 index 39f23cf..0000000 --- a/src/mainboard/google/zork/romstage.c +++ /dev/null @@ -1,11 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ - -#include <baseboard/variants.h> -#include <soc/gpio.h> -#include <soc/romstage.h> -#include <console/console.h> - -void mainboard_romstage_entry_s3(int s3_resume) -{ - variant_pcie_gpio_configure(); -}