Change in coreboot[master]: soc/amd/psp_verstage: Init TPM on S0i3 resume

[Raul Rangel (Code Review)]

Attention is currently required from: Andrey Pronin, Kangheui Won, Rob Barnes, Karthik Ramasubramanian.
Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58870 )

Change subject: soc/amd/psp_verstage: Init TPM on S0i3 resume
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Patch Set 16: Code-Review+2

(1 comment)

File src/soc/amd/common/psp_verstage/psp_verstage.c:

https://review.coreboot.org/c/coreboot/+/58870/comment/67444f75_4612abf6 
PS9, Line 230: 	verstage_mainboard_espi_init();
             : 	/* verstage_soc_init should init i2c and eSPI */
             : 	verstage_soc_init();
             : 	/*
             : 	 * verstage_mainboard_tpm_init may check board_id which depends on eSPI,
             : 	 * so it must come after verstage_mainboard_espi_init and verstage_soc_init.
             : 	 */
             : 	verstage_mainboard_tpm_init();
> I moved TPM and eSPI gpios out of esarly_gpio_table as suggested.  […]

Ack