[S] Change in coreboot[master]: soc/mediatek/mt8186: Lower SPI NOR frequency from 52Mhz to 39Mhz

[Rex-BC Chen (Code Review)]

Attention is currently required from: Hung-Te Lin, Bayi Cheng, Yidi Lin, Yu-Ping Wu.

Rex-BC Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68659 )

Change subject: soc/mediatek/mt8186: Lower SPI NOR frequency from 52Mhz to 39Mhz
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Patch Set 3:

(2 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/68659/comment/2c70b383_a1d6cbd1 
PS2, Line 10: winbond
> please fill the model name

Done

https://review.coreboot.org/c/coreboot/+/68659/comment/f58558b1_1ebc81d1 
PS2, Line 14: We change the NOR flash clcok parent and adjust the clock from 52M to
> remove this paragraph

Done