Change in coreboot[master]: drivers/spi: remove SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B option
Aaron Durbin has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38166 )
Change subject: drivers/spi: remove SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B option ......................................................................
drivers/spi: remove SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B option
The SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B option is no longer being used in the code. There's a runtime check for supporting fast read dual output mode of the spi flash. Remove the references to SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B.
Change-Id: Ie7d9d3f91f29a700f07ab33feaf427a872bbf7df Signed-off-by: Aaron Durbin adurbin@chromium.org --- M src/drivers/spi/Kconfig M src/mainboard/google/nyan/Kconfig M src/mainboard/google/nyan_big/Kconfig M src/mainboard/google/nyan_blaze/Kconfig 4 files changed, 0 insertions(+), 12 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/38166/1
diff --git a/src/drivers/spi/Kconfig b/src/drivers/spi/Kconfig index 8300026..a4be84d 100644 --- a/src/drivers/spi/Kconfig +++ b/src/drivers/spi/Kconfig @@ -149,15 +149,6 @@ Select this option if your chipset driver needs to store certain data in the SPI flash and your SPI flash is made by Winbond.
-config SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B - bool - default n - depends on SPI_FLASH - help - Select this option if your SPI flash supports the fast read dual- - output command (opcode 0x3b) where the opcode and address are sent - to the chip on MOSI and data is received on both MOSI and MISO. - config SPI_FLASH_HAS_VOLATILE_GROUP bool default n diff --git a/src/mainboard/google/nyan/Kconfig b/src/mainboard/google/nyan/Kconfig index c617545..cc649e6 100644 --- a/src/mainboard/google/nyan/Kconfig +++ b/src/mainboard/google/nyan/Kconfig @@ -27,7 +27,6 @@ select SPI_FLASH select SPI_FLASH_GIGADEVICE select SPI_FLASH_WINBOND - select SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B
config VBOOT select EC_GOOGLE_CHROMEEC_SWITCHES diff --git a/src/mainboard/google/nyan_big/Kconfig b/src/mainboard/google/nyan_big/Kconfig index f02f694..87e39aa 100644 --- a/src/mainboard/google/nyan_big/Kconfig +++ b/src/mainboard/google/nyan_big/Kconfig @@ -27,7 +27,6 @@ select SPI_FLASH select SPI_FLASH_GIGADEVICE select SPI_FLASH_WINBOND - select SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B select MAINBOARD_HAS_I2C_TPM_GENERIC select MAINBOARD_HAS_TPM1
diff --git a/src/mainboard/google/nyan_blaze/Kconfig b/src/mainboard/google/nyan_blaze/Kconfig index 8de957d..82a28ed 100644 --- a/src/mainboard/google/nyan_blaze/Kconfig +++ b/src/mainboard/google/nyan_blaze/Kconfig @@ -27,7 +27,6 @@ select SPI_FLASH select SPI_FLASH_GIGADEVICE select SPI_FLASH_WINBOND - select SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B select MAINBOARD_HAS_I2C_TPM_GENERIC select MAINBOARD_HAS_TPM1
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38166 )
Change subject: drivers/spi: remove SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B option ......................................................................
Patch Set 3: Code-Review+2
Hello build bot (Jenkins), Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/38166
to look at the new patch set (#4).
Change subject: drivers/spi: remove SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B option ......................................................................
drivers/spi: remove SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B option
The SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B option is no longer being used in the code. There's a runtime check for supporting fast read dual output mode of the spi flash. Remove the references to SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B.
Change-Id: Ie7d9d3f91f29a700f07ab33feaf427a872bbf7df Signed-off-by: Aaron Durbin adurbin@chromium.org --- M src/drivers/spi/Kconfig M src/mainboard/google/nyan/Kconfig M src/mainboard/google/nyan_big/Kconfig M src/mainboard/google/nyan_blaze/Kconfig 4 files changed, 0 insertions(+), 12 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/38166/4
Aaron Durbin has submitted this change. ( https://review.coreboot.org/c/coreboot/+/38166 )
Change subject: drivers/spi: remove SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B option ......................................................................
drivers/spi: remove SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B option
The SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B option is no longer being used in the code. There's a runtime check for supporting fast read dual output mode of the spi flash. Remove the references to SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B.
Change-Id: Ie7d9d3f91f29a700f07ab33feaf427a872bbf7df Signed-off-by: Aaron Durbin adurbin@chromium.org Reviewed-on: https://review.coreboot.org/c/coreboot/+/38166 Reviewed-by: Furquan Shaikh furquan@google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/drivers/spi/Kconfig M src/mainboard/google/nyan/Kconfig M src/mainboard/google/nyan_big/Kconfig M src/mainboard/google/nyan_blaze/Kconfig 4 files changed, 0 insertions(+), 12 deletions(-)
Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved
diff --git a/src/drivers/spi/Kconfig b/src/drivers/spi/Kconfig index 8300026..a4be84d 100644 --- a/src/drivers/spi/Kconfig +++ b/src/drivers/spi/Kconfig @@ -149,15 +149,6 @@ Select this option if your chipset driver needs to store certain data in the SPI flash and your SPI flash is made by Winbond.
-config SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B - bool - default n - depends on SPI_FLASH - help - Select this option if your SPI flash supports the fast read dual- - output command (opcode 0x3b) where the opcode and address are sent - to the chip on MOSI and data is received on both MOSI and MISO. - config SPI_FLASH_HAS_VOLATILE_GROUP bool default n diff --git a/src/mainboard/google/nyan/Kconfig b/src/mainboard/google/nyan/Kconfig index c617545..cc649e6 100644 --- a/src/mainboard/google/nyan/Kconfig +++ b/src/mainboard/google/nyan/Kconfig @@ -27,7 +27,6 @@ select SPI_FLASH select SPI_FLASH_GIGADEVICE select SPI_FLASH_WINBOND - select SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B
config VBOOT select EC_GOOGLE_CHROMEEC_SWITCHES diff --git a/src/mainboard/google/nyan_big/Kconfig b/src/mainboard/google/nyan_big/Kconfig index f02f694..87e39aa 100644 --- a/src/mainboard/google/nyan_big/Kconfig +++ b/src/mainboard/google/nyan_big/Kconfig @@ -27,7 +27,6 @@ select SPI_FLASH select SPI_FLASH_GIGADEVICE select SPI_FLASH_WINBOND - select SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B select MAINBOARD_HAS_I2C_TPM_GENERIC select MAINBOARD_HAS_TPM1
diff --git a/src/mainboard/google/nyan_blaze/Kconfig b/src/mainboard/google/nyan_blaze/Kconfig index 8de957d..82a28ed 100644 --- a/src/mainboard/google/nyan_blaze/Kconfig +++ b/src/mainboard/google/nyan_blaze/Kconfig @@ -27,7 +27,6 @@ select SPI_FLASH select SPI_FLASH_GIGADEVICE select SPI_FLASH_WINBOND - select SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B select MAINBOARD_HAS_I2C_TPM_GENERIC select MAINBOARD_HAS_TPM1
-
Aaron Durbin (Code Review) -
Furquan Shaikh (Code Review)