Attention is currently required from: Arthur Heymans, Raul Rangel, Tristan Corrick, Tim Wawrzynczak, Alexander Couzens, Patrick Rudolph. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59314 )
Change subject: cpu/haswell/*.c: Use static.c exposed lapic 0 ......................................................................
Patch Set 2:
(1 comment)
File src/mainboard/google/auron/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/59314/comment/b4139667_6f0039de PS2, Line 20: device lapic 0xacac off end
There are different ways to set up the devicetree organizationally, and they're probably all going t […]
Out of curiosity, I've compared static.c of the Asrock B85M Pro4 before and after changing the following:
diff --git a/src/mainboard/asrock/b85m_pro4/devicetree.cb b/src/mainboard/asrock/b85m_pro4/devicetree.cb index 43a65f8197..e73a24bfcb 100644 --- a/src/mainboard/asrock/b85m_pro4/devicetree.cb +++ b/src/mainboard/asrock/b85m_pro4/devicetree.cb @@ -1,15 +1,15 @@ +chip cpu/intel/haswell + device cpu_cluster 0 on + device lapic 0 on end + device lapic 0xacac off end + end +end + chip northbridge/intel/haswell
# This mainboard has VGA register "gpu_ddi_e_connected" = "1"
- device cpu_cluster 0 on - chip cpu/intel/haswell - device lapic 0 on end - device lapic 0xacac off end - end - end - device domain 0 on subsystemid 0x1849 0x0c00 inherit
The resulting static.c is nearly identical, only two lines change:
diff --git a/static.c b/static.c index 4e0c4f4acb..6f149aff38 100644 --- a/static.c +++ b/static.c @@ -149,9 +149,9 @@ STORAGE struct device _dev_0 = { .link_list = &_dev_0_links[0], .sibling = &_dev_1, #if !DEVTREE_EARLY - .chip_ops = &northbridge_intel_haswell_ops, + .chip_ops = &cpu_intel_haswell_ops, #endif - .chip_info = &northbridge_intel_haswell_info_1, + .chip_info = &cpu_intel_haswell_info_1, .next=&_dev_1, #if !DEVTREE_EARLY #if CONFIG(GENERATE_SMBIOS_TABLES)
-
Angel Pons (Code Review)