Maximilian Brune has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/84377?usp=email )
Change subject: soc/amd/glinda/chipset.cb: Add missing devices ......................................................................
soc/amd/glinda/chipset.cb: Add missing devices
Source: Document 57254
Change-Id: I9675d45eba257e52d9a870a4cc153b925267f840 Signed-off-by: Maximilian Brune maximilian.brune@9elements.com --- M src/soc/amd/glinda/chipset.cb 1 file changed, 13 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/84377/1
diff --git a/src/soc/amd/glinda/chipset.cb b/src/soc/amd/glinda/chipset.cb index 5a6541fe..6e23c2d 100644 --- a/src/soc/amd/glinda/chipset.cb +++ b/src/soc/amd/glinda/chipset.cb @@ -10,6 +10,9 @@ device pci 00.2 alias iommu off ops amd_iommu_ops end
device pci 01.0 on end # Dummy device function + device pci 01.1 alias usb4_pcie_bridge_0 off end + device pci 01.2 alias usb4_pcie_bridge_1 off end + device pci 01.3 alias usb4_pcie_bridge_2 off end
device pci 02.0 on end # Dummy device function, do not disable device pci 02.1 alias gpp_bridge_0 off ops amd_external_pcie_gpp_ops end @@ -18,6 +21,13 @@ device pci 02.4 alias gpp_bridge_3 off ops amd_external_pcie_gpp_ops end device pci 02.5 alias gpp_bridge_4 off ops amd_external_pcie_gpp_ops end device pci 02.6 alias gpp_bridge_5 off ops amd_external_pcie_gpp_ops end + device pci 03.0 on end # Dummy device function, do not disable + device pci 03.1 alias gpp_bridge_3_1 off ops amd_external_pcie_gpp_ops end + device pci 03.2 alias gpp_bridge_3_2 off ops amd_external_pcie_gpp_ops end + device pci 03.3 alias gpp_bridge_3_3 off ops amd_external_pcie_gpp_ops end + device pci 03.4 alias gpp_bridge_3_4 off ops amd_external_pcie_gpp_ops end + device pci 03.5 alias gpp_bridge_3_5 off ops amd_external_pcie_gpp_ops end + device pci 03.6 alias gpp_bridge_3_6 off ops amd_external_pcie_gpp_ops end
device pci 08.0 on end # Dummy device function, do not disable device pci 08.1 alias gpp_bridge_a off # Internal GPP Bridge 0 to Bus A @@ -47,6 +57,7 @@ device pci 08.2 alias gpp_bridge_b off # Internal GPP Bridge 1 to Bus B ops amd_internal_pcie_gpp_ops device pci 0.0 on end # dummy, do not disable + device pci 0.1 alias npu off end # Neural Processing Unit (NPU) end
device pci 08.3 alias gpp_bridge_c off # Internal GPP Bridge 2 to Bus C @@ -109,6 +120,8 @@ end end end + device pci 0.5 alias usb4_router_0 off end + device pci 0.6 alias usb4_router_1 off end end
device pci 14.0 alias smbus on ops amd_smbus_ops end # primary FCH function