[M] Change in coreboot[main]: soc/intel/common/block/pmc: Add GPE1 functions

[Jamie Ryu (Code Review)]

Attention is currently required from: Anil Kumar K, Bora Guvendik, Cliff Huang, Hannah Williams, Subrata Banik.

Jamie Ryu has posted comments on this change by Cliff Huang. ( https://review.coreboot.org/c/coreboot/+/84104?usp=email )

Change subject: soc/intel/common/block/pmc: Add GPE1 functions
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Patch Set 3:

(5 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/84104/comment/5026318e_8c07f831?usp... :
PS3, Line 10: ppe0
gpe0

File src/soc/intel/common/block/pmc/pmclib.c:

https://review.coreboot.org/c/coreboot/+/84104/comment/1a1b7f2d_7f911234?usp... :
PS3, Line 367: pmc_clear_std_gpe_status
> > I would have implemented this logic in a more abstract way (w/ an assumption that we have either o […]

I like this idea to use a single api to clear std gpe0 and gpe1.

https://review.coreboot.org/c/coreboot/+/84104/comment/b2a7d820_60c7c6d2?usp... :
PS3, Line 368: gpi
pmc_clear_std_gpe1_status?

https://review.coreboot.org/c/coreboot/+/84104/comment/ff668c99_d3a05e0a?usp... :
PS3, Line 393: void pmc_clear_std_gpe1_status
> Can this be instead pmc_clear_gpe1_status ? Unlike GPE0, you don't need the STD offset to be handled […]

I think all gpe1 registers are like standard gpe0 register, so naming with std looks okay.

https://review.coreboot.org/c/coreboot/+/84104/comment/f77a1e63_4be518bf?usp... :
PS3, Line 406: pmc_clear_gpi_gpe0_status
> why you don't need to clean GPE1 status?

I think pmc_clear_std_gpe1_status is gonna clear all GPE1 registers, so wondering if anything missing.