[M] Change in coreboot[main]: soc/mediatek/mt8196: Fix timer reset in BL31

[Zhanzhan Ge (Code Review)]

Attention is currently required from: Hung-Te Lin, Jarried Lin, Yu-Ping Wu.

Zhanzhan Ge has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/83928?usp=email )

Change subject: soc/mediatek/mt8196: Fix timer reset in BL31
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Patch Set 23:

(3 comments)

File src/soc/mediatek/mt8196/timer_prepare.c:

https://review.coreboot.org/c/coreboot/+/83928/comment/d1153d90_4088cbe9?usp... :
PS23, Line 18: write32
> `WRITE32_BITFIELDS`

Dear yuping:
May I ask why it needs to be changed to WRITE32_BITFIELDS&SET32_BITFIELDS?
1.Previously, the upstream code of Google also included wirte32() and others
2. Write32 and setbits32 are more concise and clear, and if BITFIELDS is used, the changes will also be significant
If modifications are necessary, could you provide guidance on how to modify it to meet your requirements?

https://review.coreboot.org/c/coreboot/+/83928/comment/ca808183_66e3004a?usp... :
PS23, Line 23: setbits32
> `SET32_BITFIELDS`

Done

https://review.coreboot.org/c/coreboot/+/83928/comment/bf0b9d4b_42137ed7?usp... :
PS23, Line 30: clrsetbits32p
> Please use `SET32_BITFIELDS` as suggested by Hung-Te.

Done