[S] Change in coreboot[master]: mb/google/brya/var/vell: update FW_config to sync config.star

[Shon Wang (Code Review)]

Shon Wang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/75913?usp=email )

Change subject: mb/google/brya/var/vell: update FW_config to sync config.star
......................................................................

mb/google/brya/var/vell: update FW_config to sync config.star

We have found inconsistencies in turn of FW_CONFIG settings/definitions,
so sync setting to vell config.star

BUG=b:282189358
BRANCH=firmware-brya-14505.B
TEST=emerge-brya coreboot

Change-Id: I676b719ecc711a6f59e76465a3566bf63924d90f
Signed-off-by: Shon Wang 
---
M src/mainboard/google/brya/variants/vell/overridetree.cb
1 file changed, 21 insertions(+), 5 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/75913/1

diff --git a/src/mainboard/google/brya/variants/vell/overridetree.cb b/src/mainboard/google/brya/variants/vell/overridetree.cb
index 1100628..c8e6799 100644
--- a/src/mainboard/google/brya/variants/vell/overridetree.cb
+++ b/src/mainboard/google/brya/variants/vell/overridetree.cb
@@ -1,25 +1,41 @@
 fw_config
-	field DB_SD 0 1
+	field DB_CELLULAR 0 0
+		option DB_CELLULAR_ABSENT	0
+		option DB_CELLULAR_PCIE		1
+	end
+	field KB_COLOR 1 1
+		option KB_COLOR_WHITE		0
+		option KB_COLOR_BLUE		1
+	end
+	field NAND 2 2
+		option NAND_MICRON		0
+		option NAND_KIOXIA		1
+	end
+	field DB_SD 3 4
    	option SD_ABSENT		0
    	option SD_GL9750		1
    end
-	field KB_BL 2 2
+	field KB_BL 5 5
    	option KB_BL_ABSENT		0
    	option KB_BL_PRESENT		1
    end
-	field AUDIO 3 5
+	field AUDIO 6 8
    	option AUDIO_UNKNOWN		0
    	option MAX98360_ALC5682I_I2S	1
    	option MAX98360_ALC5682IVS_I2S	2
    end
-	field DB_LTE 6 7
+	field DB_LTE 9 10
    	option LTE_ABSENT		0
    	option LTE_USB			1
    end
-	field EPS 10 10
+	field EPS 11 11
    	option PRIVACY_SCREEN_ABSENT	0
    	option PRIVACY_SCREEN		1
    end
+	field WIFI_SAR_ID 30 31
+		option WIFI_SAR_ID_0		0
+		option WIFI_SAR_ID_1		1
+	end
 end
 chip soc/intel/alderlake
    # Intel Common SoC Config