[M] Change in coreboot[main]: soc/intel: Adapt crashlog IP to also support 64-bit

[Sowmya Aralguppe (Code Review)]

Attention is currently required from: Angel Pons, Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Jamie Ryu, Kapil Porwal, Nick Vaccaro, Paul Menzel, Pratikkumar V Prajapati, Subrata Banik, Tarun.

Sowmya Aralguppe has posted comments on this change by Sowmya Aralguppe. ( https://review.coreboot.org/c/coreboot/+/83106?usp=email )

Change subject: soc/intel: Adapt crashlog IP to also support 64-bit
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Patch Set 24:

(4 comments)

Patchset:

PS13:
> @[e-mail], can you please help to review this CL once.

will check for crashlog trigger,bert table generation and decode for both 32 and 64 and update the result

Patchset:

PS22:
> I wouldnt say that the implementation was wrong but imho it did not have all child records .

Done

File src/soc/intel/meteorlake/crashlog.c:

https://review.coreboot.org/c/coreboot/+/83106/comment/7bf6c2ba_563f3d37?usp... :
PS22, Line 355: 		if (!is_crashlog_data_valid(dw0))
> right where it checks for buffer size for non zero value . […]

Acknowledged

https://review.coreboot.org/c/coreboot/+/83106/comment/df0073ea_0d2f08a3?usp... :
PS22, Line 352: + 4
> The crashlog generation and decoding is not working in MTL mainline (without my changes)  but workin […]

Done