[XS] Change in coreboot[main]: mb/google/brask/var/bujia: enable UART1

[Shon Wang (Code Review)]

Shon Wang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/83205?usp=email )

Change subject: mb/google/brask/var/bujia: enable UART1
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mb/google/brask/var/bujia: enable UART1

Enable UART1 for OPS TX25 UART funtion

BUG=b:338917836
TEST= USE="-project_all project_bujia" emerge-brask coreboot

Change-Id: I5617331aaf505b97e25a717b145fb70dc53f5a38
Signed-off-by: Shon Wang 
---
M src/mainboard/google/brya/variants/bujia/overridetree.cb
1 file changed, 6 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/83205/1

diff --git a/src/mainboard/google/brya/variants/bujia/overridetree.cb b/src/mainboard/google/brya/variants/bujia/overridetree.cb
index 252d82f..4255296 100644
--- a/src/mainboard/google/brya/variants/bujia/overridetree.cb
+++ b/src/mainboard/google/brya/variants/bujia/overridetree.cb
@@ -46,6 +46,12 @@
    	[PchSerialIoIndexGSPI1] = PchSerialIoDisabled,
    }"

+	register "serial_io_uart_mode" = "{
+		[PchSerialIoIndexUART0] = PchSerialIoPci,
+		[PchSerialIoIndexUART1] = PchSerialIoPci,
+		[PchSerialIoIndexUART2] = PchSerialIoDisabled,
+	}"
+
    register "ddi_ports_config" = "{
    	[DDI_PORT_A] = DDI_ENABLE_HPD,
    	[DDI_PORT_B] = DDI_ENABLE_HPD | DDI_ENABLE_DDC,