Michael Niewöhner has submitted this change. ( https://review.coreboot.org/c/coreboot/+/68793 )
(
4 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: mb/clevo/l140cu: work around PECI staying high when idle, blocking s0ix ......................................................................
mb/clevo/l140cu: work around PECI staying high when idle, blocking s0ix
According to Intel doc# 575683 the PECI bus should be low when idle and is pulled up by clients with strong drive. However, for unknown reasons the bus stays high on this board, blocking s0ix entry.
The PECI reference schematic in the ASPEED AST2400 BMC datasheet (actually not related to this board) says that a pull-down is *required* for the idle state.
This might be just a requirement of this BMC, since this is nowhere documented in Intel datasheets, schematics or elsewhere. However, configuring a weak pull-down (20 k) on the PECI pad indeed solves this problem for now.
Change-Id: Ib5a6b0ad3553c2cf795037d6a1982102bcb04644 Signed-off-by: Michael Niewöhner foss@mniewoehner.de Reviewed-on: https://review.coreboot.org/c/coreboot/+/68793 Reviewed-by: Angel Pons th3fanbus@gmail.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/clevo/cml-u/variants/l140cu/gpio.c 1 file changed, 29 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved
diff --git a/src/mainboard/clevo/cml-u/variants/l140cu/gpio.c b/src/mainboard/clevo/cml-u/variants/l140cu/gpio.c index fb658dd..258f076 100644 --- a/src/mainboard/clevo/cml-u/variants/l140cu/gpio.c +++ b/src/mainboard/clevo/cml-u/variants/l140cu/gpio.c @@ -233,6 +233,9 @@ PAD_NC(GPP_H21, NONE), PAD_NC(GPP_H22, UP_20K), PAD_NC(GPP_H23, UP_20K), + + /* ------- GPIO Group CPU ------- */ + PAD_CFG_NF(PECI_IO, DN_20K, DEEP, NF1), /* PECI */ };
void variant_configure_gpios(void)