Change in coreboot[master]: mb/adlrvp: Fix DDR5 Boot issue - coreboot-gerrit

8 Jul 2021


      Attention is currently required from: Bora Guvendik, Furquan Shaikh, Selma Bensaid, Maulik V Vaghela, Tim Wawrzynczak, Paul Menzel, Angel Pons, Patrick Rudolph.
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50996 )
Change subject: mb/adlrvp: Fix DDR5 Boot issue
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Patch Set 16:
(1 comment)
File src/soc/intel/alderlake/meminit.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-123630):
https://review.coreboot.org/c/coreboot/+/50996/comment/1d85a0ef_280828ab 
PS16, Line 266: 		mem_populate_channel_data(&soc_mem_cfg[mb_cfg->type], spd_info, half_populated, &data);
line over 96 characters
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I9998bfcd12b81c11fcc9f791da2a27d3c788e48a
Gerrit-Change-Number: 50996
Gerrit-PatchSet: 16
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