Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/49123 )
Change subject: soc/intel: Include gfx.asl from northbridge ......................................................................
soc/intel: Include gfx.asl from northbridge
The iGPU is on the northbridge or system agent, not the southbridge.
Change-Id: Ic63a7ad532fd1faa8e90d44bf7269040fa901757 Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/soc/intel/apollolake/acpi/northbridge.asl M src/soc/intel/apollolake/acpi/southbridge.asl M src/soc/intel/cannonlake/acpi/southbridge.asl M src/soc/intel/common/block/acpi/acpi/northbridge.asl M src/soc/intel/elkhartlake/acpi/southbridge.asl M src/soc/intel/icelake/acpi/southbridge.asl M src/soc/intel/jasperlake/acpi/southbridge.asl M src/soc/intel/skylake/acpi/pch.asl M src/soc/intel/skylake/acpi/systemagent.asl M src/soc/intel/tigerlake/acpi/southbridge.asl 10 files changed, 9 insertions(+), 21 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/49123/1
diff --git a/src/soc/intel/apollolake/acpi/northbridge.asl b/src/soc/intel/apollolake/acpi/northbridge.asl index 1450983..6a71900 100644 --- a/src/soc/intel/apollolake/acpi/northbridge.asl +++ b/src/soc/intel/apollolake/acpi/northbridge.asl @@ -114,3 +114,6 @@
Return (MCRS) } + +/* GFX 00:02.0 */ +#include <drivers/intel/gma/acpi/gfx.asl> diff --git a/src/soc/intel/apollolake/acpi/southbridge.asl b/src/soc/intel/apollolake/acpi/southbridge.asl index 4d4e4dc..f4d1497 100644 --- a/src/soc/intel/apollolake/acpi/southbridge.asl +++ b/src/soc/intel/apollolake/acpi/southbridge.asl @@ -17,9 +17,6 @@
#include "xhci.asl"
-/* GFX 00:02.0 */ -#include <drivers/intel/gma/acpi/gfx.asl> - /* LPC */ #include <soc/intel/common/block/acpi/acpi/lpc.asl>
diff --git a/src/soc/intel/cannonlake/acpi/southbridge.asl b/src/soc/intel/cannonlake/acpi/southbridge.asl index f091d8f..01c2250 100644 --- a/src/soc/intel/cannonlake/acpi/southbridge.asl +++ b/src/soc/intel/cannonlake/acpi/southbridge.asl @@ -16,9 +16,6 @@ #include "gpio.asl" #endif
-/* GFX 00:02.0 */ -#include <drivers/intel/gma/acpi/gfx.asl> - /* LPC 0:1f.0 */ #include <soc/intel/common/block/acpi/acpi/lpc.asl>
diff --git a/src/soc/intel/common/block/acpi/acpi/northbridge.asl b/src/soc/intel/common/block/acpi/acpi/northbridge.asl index 5780f4c..89495a9 100644 --- a/src/soc/intel/common/block/acpi/acpi/northbridge.asl +++ b/src/soc/intel/common/block/acpi/acpi/northbridge.asl @@ -309,3 +309,6 @@ Return (BUF0) } } + +/* GFX 00:02.0 */ +#include <drivers/intel/gma/acpi/gfx.asl> diff --git a/src/soc/intel/elkhartlake/acpi/southbridge.asl b/src/soc/intel/elkhartlake/acpi/southbridge.asl index 02425c4..ccad776 100644 --- a/src/soc/intel/elkhartlake/acpi/southbridge.asl +++ b/src/soc/intel/elkhartlake/acpi/southbridge.asl @@ -14,9 +14,6 @@ /* GPIO controller */ #include "gpio.asl"
-/* GFX 00:02.0 */ -#include <drivers/intel/gma/acpi/gfx.asl> - /* ESPI 0:1f.0 */ #include <soc/intel/common/block/acpi/acpi/lpc.asl>
diff --git a/src/soc/intel/icelake/acpi/southbridge.asl b/src/soc/intel/icelake/acpi/southbridge.asl index 925f28f..4abea7c 100644 --- a/src/soc/intel/icelake/acpi/southbridge.asl +++ b/src/soc/intel/icelake/acpi/southbridge.asl @@ -17,9 +17,6 @@ /* GPIO controller */ #include "gpio.asl"
-/* GFX 00:02.0 */ -#include <drivers/intel/gma/acpi/gfx.asl> - /* ESPI 0:1f.0 */ #include <soc/intel/common/block/acpi/acpi/lpc.asl>
diff --git a/src/soc/intel/jasperlake/acpi/southbridge.asl b/src/soc/intel/jasperlake/acpi/southbridge.asl index b97ec58..e623cc3 100644 --- a/src/soc/intel/jasperlake/acpi/southbridge.asl +++ b/src/soc/intel/jasperlake/acpi/southbridge.asl @@ -17,9 +17,6 @@ /* GPIO controller */ #include "gpio.asl"
-/* GFX 00:02.0 */ -#include <drivers/intel/gma/acpi/gfx.asl> - /* ESPI 0:1f.0 */ #include <soc/intel/common/block/acpi/acpi/lpc.asl>
diff --git a/src/soc/intel/skylake/acpi/pch.asl b/src/soc/intel/skylake/acpi/pch.asl index 02e30f7..6eea5bb 100644 --- a/src/soc/intel/skylake/acpi/pch.asl +++ b/src/soc/intel/skylake/acpi/pch.asl @@ -65,6 +65,3 @@ #if CONFIG(SOC_INTEL_COMMON_BLOCK_SGX) #include <soc/intel/common/acpi/sgx.asl> #endif - -/* Integrated graphics 0:2.0 */ -#include <drivers/intel/gma/acpi/gfx.asl> diff --git a/src/soc/intel/skylake/acpi/systemagent.asl b/src/soc/intel/skylake/acpi/systemagent.asl index 962d9ef..c81e9f5 100644 --- a/src/soc/intel/skylake/acpi/systemagent.asl +++ b/src/soc/intel/skylake/acpi/systemagent.asl @@ -322,3 +322,6 @@ Return (BUF0) } } + +/* Integrated graphics 0:2.0 */ +#include <drivers/intel/gma/acpi/gfx.asl> diff --git a/src/soc/intel/tigerlake/acpi/southbridge.asl b/src/soc/intel/tigerlake/acpi/southbridge.asl index 744b7ef..3a53f2c 100644 --- a/src/soc/intel/tigerlake/acpi/southbridge.asl +++ b/src/soc/intel/tigerlake/acpi/southbridge.asl @@ -17,9 +17,6 @@ /* GPIO controller */ #include "gpio.asl"
-/* GFX 00:02.0 */ -#include <drivers/intel/gma/acpi/gfx.asl> - /* ESPI 0:1f.0 */ #include <soc/intel/common/block/acpi/acpi/lpc.asl>
Hello build bot (Jenkins), Andrey Petrov, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/49123
to look at the new patch set (#2).
Change subject: soc/intel: Include gfx.asl from northbridge ......................................................................
soc/intel: Include gfx.asl from northbridge
The iGPU is on the northbridge or system agent, not the southbridge.
Change-Id: Ic63a7ad532fd1faa8e90d44bf7269040fa901757 Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/soc/intel/apollolake/acpi/northbridge.asl M src/soc/intel/apollolake/acpi/southbridge.asl M src/soc/intel/cannonlake/acpi/southbridge.asl M src/soc/intel/common/block/acpi/acpi/northbridge.asl M src/soc/intel/elkhartlake/acpi/southbridge.asl M src/soc/intel/icelake/acpi/southbridge.asl M src/soc/intel/jasperlake/acpi/southbridge.asl M src/soc/intel/skylake/acpi/pch.asl M src/soc/intel/skylake/acpi/systemagent.asl M src/soc/intel/tigerlake/acpi/southbridge.asl 10 files changed, 9 insertions(+), 21 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/49123/2
Attention is currently required from: Tim Wawrzynczak, Angel Pons, Subrata Banik, Michael Niewöhner. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49123 )
Change subject: soc/intel: Include gfx.asl from northbridge ......................................................................
Patch Set 2: Code-Review+1
Attention is currently required from: Angel Pons, Subrata Banik, Michael Niewöhner. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49123 )
Change subject: soc/intel: Include gfx.asl from northbridge ......................................................................
Patch Set 2:
(1 comment)
Patchset:
PS2: need to fixup alderlake as well
Attention is currently required from: Angel Pons, Subrata Banik, Michael Niewöhner. Hello build bot (Jenkins), Paul Menzel, Tim Wawrzynczak, Subrata Banik, Michael Niewöhner, Andrey Petrov, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/49123
to look at the new patch set (#3).
Change subject: soc/intel: Include gfx.asl from northbridge ......................................................................
soc/intel: Include gfx.asl from northbridge
The iGPU is on the northbridge or system agent, not the southbridge.
Change-Id: Ic63a7ad532fd1faa8e90d44bf7269040fa901757 Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/soc/intel/alderlake/acpi/southbridge.asl M src/soc/intel/apollolake/acpi/northbridge.asl M src/soc/intel/apollolake/acpi/southbridge.asl M src/soc/intel/cannonlake/acpi/southbridge.asl M src/soc/intel/common/block/acpi/acpi/northbridge.asl M src/soc/intel/elkhartlake/acpi/southbridge.asl M src/soc/intel/icelake/acpi/southbridge.asl M src/soc/intel/jasperlake/acpi/southbridge.asl M src/soc/intel/skylake/acpi/pch.asl M src/soc/intel/skylake/acpi/systemagent.asl M src/soc/intel/tigerlake/acpi/southbridge.asl 11 files changed, 9 insertions(+), 24 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/49123/3
Attention is currently required from: Tim Wawrzynczak, Subrata Banik, Michael Niewöhner. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49123 )
Change subject: soc/intel: Include gfx.asl from northbridge ......................................................................
Patch Set 2:
(1 comment)
Patchset:
PS2:
need to fixup alderlake as well
Thanks, done
Attention is currently required from: Tim Wawrzynczak, Angel Pons, Michael Niewöhner. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49123 )
Change subject: soc/intel: Include gfx.asl from northbridge ......................................................................
Patch Set 3: Code-Review+2
Attention is currently required from: Tim Wawrzynczak, Angel Pons, Michael Niewöhner. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49123 )
Change subject: soc/intel: Include gfx.asl from northbridge ......................................................................
Patch Set 3: Code-Review+1
Attention is currently required from: Angel Pons, Michael Niewöhner. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49123 )
Change subject: soc/intel: Include gfx.asl from northbridge ......................................................................
Patch Set 3: Code-Review+2
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/49123 )
Change subject: soc/intel: Include gfx.asl from northbridge ......................................................................
soc/intel: Include gfx.asl from northbridge
The iGPU is on the northbridge or system agent, not the southbridge.
Change-Id: Ic63a7ad532fd1faa8e90d44bf7269040fa901757 Signed-off-by: Angel Pons th3fanbus@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/49123 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Subrata Banik subrata.banik@intel.com Reviewed-by: Paul Menzel paulepanter@users.sourceforge.net Reviewed-by: Tim Wawrzynczak twawrzynczak@chromium.org --- M src/soc/intel/alderlake/acpi/southbridge.asl M src/soc/intel/apollolake/acpi/northbridge.asl M src/soc/intel/apollolake/acpi/southbridge.asl M src/soc/intel/cannonlake/acpi/southbridge.asl M src/soc/intel/common/block/acpi/acpi/northbridge.asl M src/soc/intel/elkhartlake/acpi/southbridge.asl M src/soc/intel/icelake/acpi/southbridge.asl M src/soc/intel/jasperlake/acpi/southbridge.asl M src/soc/intel/skylake/acpi/pch.asl M src/soc/intel/skylake/acpi/systemagent.asl M src/soc/intel/tigerlake/acpi/southbridge.asl 11 files changed, 9 insertions(+), 24 deletions(-)
Approvals: build bot (Jenkins): Verified Paul Menzel: Looks good to me, but someone else must approve Subrata Banik: Looks good to me, approved Tim Wawrzynczak: Looks good to me, approved
diff --git a/src/soc/intel/alderlake/acpi/southbridge.asl b/src/soc/intel/alderlake/acpi/southbridge.asl index 744b7ef..3a53f2c 100644 --- a/src/soc/intel/alderlake/acpi/southbridge.asl +++ b/src/soc/intel/alderlake/acpi/southbridge.asl @@ -17,9 +17,6 @@ /* GPIO controller */ #include "gpio.asl"
-/* GFX 00:02.0 */ -#include <drivers/intel/gma/acpi/gfx.asl> - /* ESPI 0:1f.0 */ #include <soc/intel/common/block/acpi/acpi/lpc.asl>
diff --git a/src/soc/intel/apollolake/acpi/northbridge.asl b/src/soc/intel/apollolake/acpi/northbridge.asl index 1450983..6a71900 100644 --- a/src/soc/intel/apollolake/acpi/northbridge.asl +++ b/src/soc/intel/apollolake/acpi/northbridge.asl @@ -114,3 +114,6 @@
Return (MCRS) } + +/* GFX 00:02.0 */ +#include <drivers/intel/gma/acpi/gfx.asl> diff --git a/src/soc/intel/apollolake/acpi/southbridge.asl b/src/soc/intel/apollolake/acpi/southbridge.asl index 4d4e4dc..f4d1497 100644 --- a/src/soc/intel/apollolake/acpi/southbridge.asl +++ b/src/soc/intel/apollolake/acpi/southbridge.asl @@ -17,9 +17,6 @@
#include "xhci.asl"
-/* GFX 00:02.0 */ -#include <drivers/intel/gma/acpi/gfx.asl> - /* LPC */ #include <soc/intel/common/block/acpi/acpi/lpc.asl>
diff --git a/src/soc/intel/cannonlake/acpi/southbridge.asl b/src/soc/intel/cannonlake/acpi/southbridge.asl index f091d8f..01c2250 100644 --- a/src/soc/intel/cannonlake/acpi/southbridge.asl +++ b/src/soc/intel/cannonlake/acpi/southbridge.asl @@ -16,9 +16,6 @@ #include "gpio.asl" #endif
-/* GFX 00:02.0 */ -#include <drivers/intel/gma/acpi/gfx.asl> - /* LPC 0:1f.0 */ #include <soc/intel/common/block/acpi/acpi/lpc.asl>
diff --git a/src/soc/intel/common/block/acpi/acpi/northbridge.asl b/src/soc/intel/common/block/acpi/acpi/northbridge.asl index 5780f4c..89495a9 100644 --- a/src/soc/intel/common/block/acpi/acpi/northbridge.asl +++ b/src/soc/intel/common/block/acpi/acpi/northbridge.asl @@ -309,3 +309,6 @@ Return (BUF0) } } + +/* GFX 00:02.0 */ +#include <drivers/intel/gma/acpi/gfx.asl> diff --git a/src/soc/intel/elkhartlake/acpi/southbridge.asl b/src/soc/intel/elkhartlake/acpi/southbridge.asl index 02425c4..ccad776 100644 --- a/src/soc/intel/elkhartlake/acpi/southbridge.asl +++ b/src/soc/intel/elkhartlake/acpi/southbridge.asl @@ -14,9 +14,6 @@ /* GPIO controller */ #include "gpio.asl"
-/* GFX 00:02.0 */ -#include <drivers/intel/gma/acpi/gfx.asl> - /* ESPI 0:1f.0 */ #include <soc/intel/common/block/acpi/acpi/lpc.asl>
diff --git a/src/soc/intel/icelake/acpi/southbridge.asl b/src/soc/intel/icelake/acpi/southbridge.asl index 925f28f..4abea7c 100644 --- a/src/soc/intel/icelake/acpi/southbridge.asl +++ b/src/soc/intel/icelake/acpi/southbridge.asl @@ -17,9 +17,6 @@ /* GPIO controller */ #include "gpio.asl"
-/* GFX 00:02.0 */ -#include <drivers/intel/gma/acpi/gfx.asl> - /* ESPI 0:1f.0 */ #include <soc/intel/common/block/acpi/acpi/lpc.asl>
diff --git a/src/soc/intel/jasperlake/acpi/southbridge.asl b/src/soc/intel/jasperlake/acpi/southbridge.asl index b97ec58..e623cc3 100644 --- a/src/soc/intel/jasperlake/acpi/southbridge.asl +++ b/src/soc/intel/jasperlake/acpi/southbridge.asl @@ -17,9 +17,6 @@ /* GPIO controller */ #include "gpio.asl"
-/* GFX 00:02.0 */ -#include <drivers/intel/gma/acpi/gfx.asl> - /* ESPI 0:1f.0 */ #include <soc/intel/common/block/acpi/acpi/lpc.asl>
diff --git a/src/soc/intel/skylake/acpi/pch.asl b/src/soc/intel/skylake/acpi/pch.asl index d2e922c..136e5c4 100644 --- a/src/soc/intel/skylake/acpi/pch.asl +++ b/src/soc/intel/skylake/acpi/pch.asl @@ -66,8 +66,5 @@ #include <soc/intel/common/acpi/sgx.asl> #endif
-/* Integrated graphics 0:2.0 */ -#include <drivers/intel/gma/acpi/gfx.asl> - /* Intel Power Engine Plug-in */ #include <soc/intel/common/block/acpi/acpi/pep.asl> diff --git a/src/soc/intel/skylake/acpi/systemagent.asl b/src/soc/intel/skylake/acpi/systemagent.asl index d1441c4..709e1f7 100644 --- a/src/soc/intel/skylake/acpi/systemagent.asl +++ b/src/soc/intel/skylake/acpi/systemagent.asl @@ -322,3 +322,6 @@ Return (BUF0) } } + +/* Integrated graphics 0:2.0 */ +#include <drivers/intel/gma/acpi/gfx.asl> diff --git a/src/soc/intel/tigerlake/acpi/southbridge.asl b/src/soc/intel/tigerlake/acpi/southbridge.asl index 744b7ef..3a53f2c 100644 --- a/src/soc/intel/tigerlake/acpi/southbridge.asl +++ b/src/soc/intel/tigerlake/acpi/southbridge.asl @@ -17,9 +17,6 @@ /* GPIO controller */ #include "gpio.asl"
-/* GFX 00:02.0 */ -#include <drivers/intel/gma/acpi/gfx.asl> - /* ESPI 0:1f.0 */ #include <soc/intel/common/block/acpi/acpi/lpc.asl>
-
Angel Pons (Code Review) -
Patrick Georgi (Code Review)
-
Paul Menzel (Code Review)
-
Subrata Banik (Code Review)
-
Tim Wawrzynczak (Code Review)