Hello build bot (Jenkins), Jamie Ryu,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/44561
to look at the new patch set (#2).
Change subject: mb/intel/tglrvp: Update SLP_Sx assertion widths and PwrCycDur ......................................................................
mb/intel/tglrvp: Update SLP_Sx assertion widths and PwrCycDur
This patch updates the SLP_Sx assertion widths and power cycle duration for TGLRVP.
Power cycle duration: With default value, S0->S5 -> [ ~4.2 seconds delay ] -> S5->S0
With value set to 1, S0->S5 -> [ ~1.2 seconds delay ] -> S5->S0
TEST=Verified that the power cycle duration is 1~2s with global reset on TGLRVP.
Signed-off-by: Jamie Ryu jamie.m.ryu@intel.com Change-Id: Ic4bb5aac1e3832e9c4521f9a7970216394e59f29 --- M src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb M src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb 2 files changed, 68 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/61/44561/2