[S] Change in coreboot[main]: mainboard/intel/avenuecity_crb: Update full IIO configuration

[Shuo Liu (Code Review)]

Attention is currently required from: Arthur Heymans, Christian Walter, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, Tim Chu.

Shuo Liu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/84318?usp=email )

Change subject: mainboard/intel/avenuecity_crb: Update full IIO configuration
......................................................................

mainboard/intel/avenuecity_crb: Update full IIO configuration

Change-Id: I88baa159475ac57ec6a2a638ab84f76a6af4fe82
Signed-off-by: Shuo Liu 
---
M src/mainboard/intel/avenuecity_crb/config/iio.c
M src/soc/intel/xeon_sp/gnr/include/soc/iio.h
2 files changed, 33 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/84318/1

diff --git a/src/mainboard/intel/avenuecity_crb/config/iio.c b/src/mainboard/intel/avenuecity_crb/config/iio.c
index 117d604..5406034 100644
--- a/src/mainboard/intel/avenuecity_crb/config/iio.c
+++ b/src/mainboard/intel/avenuecity_crb/config/iio.c
@@ -20,6 +20,38 @@
    	_IIO_PORT_CFG_STRUCT_BASIC_X2(0x0, 0x4B, 0x4),
    	_IIO_PORT_CFG_STRUCT_BASIC_X2(0x0, 0x4B, 0x5),
    }},
+
+	{_IIO_PE_CFG_STRUCT(0x0, PE1, CB_IIO_BIFURCATE_x16xxxxx, PE_TYPE_PCIE) {
+		/* _IIO_PORT_CFG_STRUCT_BASIC(sltpls, sltplv, psn) */
+		_IIO_PORT_CFG_STRUCT_BASIC_X16(0x0, 0x4B, 0x6),
+		_IIO_PORT_CFG_STRUCT_DISABLED,
+		_IIO_PORT_CFG_STRUCT_DISABLED,
+		_IIO_PORT_CFG_STRUCT_DISABLED,
+		_IIO_PORT_CFG_STRUCT_DISABLED,
+		_IIO_PORT_CFG_STRUCT_DISABLED,
+		_IIO_PORT_CFG_STRUCT_DISABLED,
+		_IIO_PORT_CFG_STRUCT_DISABLED,
+	}},
+
+	_IIO_PE_CFG_DISABLED(0x0, PE2),
+	_IIO_PE_CFG_DISABLED(0x0, PE3),
+	_IIO_PE_CFG_DISABLED(0x0, PE4),
+	_IIO_PE_CFG_DISABLED(0x0, PE5),
+	_IIO_PE_CFG_DISABLED(0x0, PEa),
+	_IIO_PE_CFG_DISABLED(0x0, PEb),
+	_IIO_PE_CFG_DISABLED(0x0, PEc),
+	_IIO_PE_CFG_DISABLED(0x0, PEd),
+
+	_IIO_PE_CFG_DISABLED(0x1, PE0),
+	_IIO_PE_CFG_DISABLED(0x1, PE1),
+	_IIO_PE_CFG_DISABLED(0x1, PE2),
+	_IIO_PE_CFG_DISABLED(0x1, PE3),
+	_IIO_PE_CFG_DISABLED(0x1, PE4),
+	_IIO_PE_CFG_DISABLED(0x1, PE5),
+	_IIO_PE_CFG_DISABLED(0x1, PEa),
+	_IIO_PE_CFG_DISABLED(0x1, PEb),
+	_IIO_PE_CFG_DISABLED(0x1, PEc),
+	_IIO_PE_CFG_DISABLED(0x1, PEd),
 };

const struct iio_pe_config *get_iio_config_table(int *size)
diff --git a/src/soc/intel/xeon_sp/gnr/include/soc/iio.h b/src/soc/intel/xeon_sp/gnr/include/soc/iio.h
index 16095d1..d106941 100644
--- a/src/soc/intel/xeon_sp/gnr/include/soc/iio.h
+++ b/src/soc/intel/xeon_sp/gnr/include/soc/iio.h
@@ -163,6 +163,7 @@
    	0x0, 0x0, 0x1, 0x0,\
    	0x0, 0x0, 0x0, 0x0, 0x0)

+#define _IIO_PORT_CFG_STRUCT_BASIC_X16 _IIO_PORT_CFG_STRUCT_BASIC
 #define _IIO_PORT_CFG_STRUCT_BASIC_X8 _IIO_PORT_CFG_STRUCT_BASIC
 #define _IIO_PORT_CFG_STRUCT_BASIC_X4 _IIO_PORT_CFG_STRUCT_BASIC
 #define _IIO_PORT_CFG_STRUCT_BASIC_X2 _IIO_PORT_CFG_STRUCT_BASIC