Ren Kuo has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/84545?usp=email )
Change subject: mb/google/brox/jubilant: Modify FP IRQ pin on disable pads ......................................................................
mb/google/brox/jubilant: Modify FP IRQ pin on disable pads
In previous cl:84124, FP IRQ pin has been changed to GPP_D13 from GPP_F15,and fp_disable_pads need to be updated.
Change-Id: Iee4c3d3f000f884ca8a77ae8c72ccbeebfeb865f Signed-off-by: Ren Kuo ren.kuo@quanta.corp-partner.google.com --- M src/mainboard/google/brox/variants/jubilant/fw_config.c 1 file changed, 2 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/84545/1
diff --git a/src/mainboard/google/brox/variants/jubilant/fw_config.c b/src/mainboard/google/brox/variants/jubilant/fw_config.c index 5076c73..df57e15 100644 --- a/src/mainboard/google/brox/variants/jubilant/fw_config.c +++ b/src/mainboard/google/brox/variants/jubilant/fw_config.c @@ -13,8 +13,8 @@ PAD_NC(GPP_D3, NONE), /* GPP_D15 : FPMCU_RST_J_SUB_L (active low) (NC) */ PAD_NC(GPP_D15, NONE), - /* GPP_F15 : FP GSPI INT (NC) */ - PAD_NC(GPP_F15, NONE), + /* GPP_D13 : FP GSPI INT (NC) */ + PAD_NC(GPP_D13, NONE), /* GPP_F11 : FP GSPI CLK (NC) */ PAD_NC(GPP_F11, NONE), /* GPP_F12 : FP GSPI DO (NC) */