Change in coreboot[master]: elog: Support logging CSE Lite info in elog

[Krishna P Bhat D (Code Review)]

Attention is currently required from: Martin Roth, Jamie Ryu, Rizwan Qureshi, Sridhar Siricilla, Krishna P Bhat D, Patrick Rudolph, Karthik Ramasubramanian.
Hello build bot (Jenkins), Patrick Georgi, Martin Roth, Furquan Shaikh, Jamie Ryu, Tim Wawrzynczak, Rizwan Qureshi, Sridhar Siricilla, Patrick Rudolph, Karthik Ramasubramanian,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/50472

to look at the new patch set (#6).

Change subject: elog: Support logging CSE Lite info in elog
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elog: Support logging CSE Lite info in elog

This patch adds the following updates,
1. Add support for new elog event type to log CSE Lite information in
elog.
2. Add helper functions to get cse firmware sku, manfacturing mode info in cse lib.
3. Add elog event in cse lite driver to log cse info in elog.

BUG=b:174121840
BRANCH=None
TEST=Build,  boot image and check for elog entry in logs.
localhost ~ # cbmem -c | grep -i "elog"
...
ELOG: Event(B6) added with size 32 at 2021-01-17 16:01:57 UTC

localhost ~ # mosys eventlog list
0 | 2021-01-21 08:46:18 | Log area cleared | 4088
1 | 2021-01-21 08:46:18 | Memory Cache Update | Normal | Success
2 | 2021-01-21 08:46:18 | CSE Info | Lite | 13.50.0.1269 | 13.50.0.1269
| YES | 0x5 | 0x3 | RO
3 | 2021-01-21 08:46:21 | CSE Info | Lite | 13.50.0.1269 | 13.50.0.1269
| YES | 0x5 | 0x0 | RW
4 | 2021-01-21 08:46:25 | System boot | 3098
5 | 2021-01-21 08:46:25 | Power Fail
6 | 2021-01-21 08:46:25 | SUS Power Fail
7 | 2021-01-21 08:46:25 | ACPI Wake | S5
8 | 2021-01-21 08:46:25 | Wake Source | Power Button | 0
9 | 2021-01-21 08:46:25 | Chrome OS Developer Mode

Change-Id: Ib183941d1fa0a9971e30b4092ea3d23daaa29334
Signed-off-by: Krishna Prasad Bhat 
---
M src/include/elog.h
M src/soc/intel/alderlake/Makefile.inc
M src/soc/intel/alderlake/me.c
M src/soc/intel/cannonlake/Makefile.inc
M src/soc/intel/cannonlake/me.c
M src/soc/intel/common/block/cse/cse.c
M src/soc/intel/common/block/cse/cse_lite.c
M src/soc/intel/common/block/include/intelblocks/cse.h
M src/soc/intel/jasperlake/Makefile.inc
M src/soc/intel/jasperlake/me.c
M src/soc/intel/tigerlake/Makefile.inc
M src/soc/intel/tigerlake/me.c
12 files changed, 115 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/72/50472/6