[S] Change in coreboot[main]: cpu/intel/model_206ax: Allow turbo boost ratio limit configuration

[Nico Huber (Code Review)]

Nico Huber has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83271?usp=email )

Change subject: cpu/intel/model_206ax: Allow turbo boost ratio limit configuration
......................................................................

cpu/intel/model_206ax: Allow turbo boost ratio limit configuration

Tested on ThinkPad T420 with the i7-3940XM.

Change-Id: I1c65a129478e8ac2c4f66eb3c6aa2507358f82ad
Signed-off-by: Anastasios Koutian 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83271
Tested-by: build bot (Jenkins) 
Reviewed-by: Nico Huber 
---
M src/cpu/intel/model_206ax/chip.h
M src/cpu/intel/model_206ax/model_206ax.h
M src/cpu/intel/model_206ax/model_206ax_init.c
3 files changed, 40 insertions(+), 0 deletions(-)

Approvals:
  Nico Huber: Looks good to me, approved
  build bot (Jenkins): Verified

diff --git a/src/cpu/intel/model_206ax/chip.h b/src/cpu/intel/model_206ax/chip.h
index 1102cfe..81ec2ff 100644
--- a/src/cpu/intel/model_206ax/chip.h
+++ b/src/cpu/intel/model_206ax/chip.h
@@ -38,6 +38,17 @@
    int current;			/* In Amps */
 };

+union turbo_ratio_limits {
+		/* Limit for 1, 2, 3 and 4 active cores respectively */
+		struct {
+			int limit_1c;
+			int limit_2c;
+			int limit_3c;
+			int limit_4c;
+		};
+		int raw[4];
+};
+
 struct cpu_intel_model_206ax_config {
    enum cpu_acpi_level acpi_c1;
    enum cpu_acpi_level acpi_c2;
@@ -56,6 +67,8 @@
    /* PSI states only have an effect when in Package C3 or higher */
    struct psi_state pp0_psi[3];	/* Power states for Primary Plane (Icc) */
    struct psi_state pp1_psi[3];	/* Power states for Secondary Plane (IAXG) */
+
+	union turbo_ratio_limits turbo_limits; /* Turbo ratio limits depending on the number of active cores */
 };

#endif /* __CPU_INTEL_MODEL_206AX_CHIP_H__ */
diff --git a/src/cpu/intel/model_206ax/model_206ax.h b/src/cpu/intel/model_206ax/model_206ax.h
index 9a2fefb..afe915d 100644
--- a/src/cpu/intel/model_206ax/model_206ax.h
+++ b/src/cpu/intel/model_206ax/model_206ax.h
@@ -46,6 +46,7 @@
 #define MSR_LT_LOCK_MEMORY		0x2e7
 #define MSR_PLATFORM_INFO		0xce
 #define  PLATFORM_INFO_SET_TDP		(1 << 29)
+#define  PLATFORM_INFO_SET_TURBO_LIMIT	(1 << 28)

#define MSR_MISC_PWR_MGMT		0x1aa
 #define  MISC_PWR_MGMT_EIST_HW_DIS	(1 << 0)
diff --git a/src/cpu/intel/model_206ax/model_206ax_init.c b/src/cpu/intel/model_206ax/model_206ax_init.c
index 0d0e3f7..4fa8cef 100644
--- a/src/cpu/intel/model_206ax/model_206ax_init.c
+++ b/src/cpu/intel/model_206ax/model_206ax_init.c
@@ -11,6 +11,7 @@
 #include <cpu/intel/turbo.h>
 #include <cpu/x86/cache.h>
 #include <cpu/x86/name.h>
+#include "commonlib/bsd/helpers.h"
 #include "model_206ax.h"
 #include "chip.h"
 #include <cpu/intel/smm_reloc.h>
@@ -175,6 +176,23 @@
    }
 }

+static void configure_turbo_ratio_limits(struct cpu_intel_model_206ax_config *conf)
+{
+	msr_t msr = rdmsr(MSR_TURBO_RATIO_LIMIT);
+
+	for (int i = 0; i < ARRAY_SIZE(conf->turbo_limits.raw); i++) {
+		const int shift = i * 8;
+		const int limit = conf->turbo_limits.raw[i];
+
+		if (limit) {
+			msr.lo &= ~(0xff << shift);
+			msr.lo |= (limit << shift);
+		}
+	}
+
+	wrmsr(MSR_TURBO_RATIO_LIMIT, msr);
+}
+
 static void configure_c_states(struct device *dev)
 {
    struct cpu_intel_model_206ax_config *conf = dev->upstream->dev->chip_info;
@@ -298,6 +316,14 @@
    	msr.lo |= PP1_CURRENT_LIMIT_LOCK;
    	wrmsr(MSR_PP1_CURRENT_CONFIG, msr);
    }
+
+	msr = rdmsr(MSR_PLATFORM_INFO);
+	if (msr.lo & PLATFORM_INFO_SET_TURBO_LIMIT) {
+		configure_turbo_ratio_limits(conf);
+	} else {
+		printk(BIOS_INFO, "%s: Programmable ratio limit for turbo mode is disabled\n",
+		       dev_path(dev));
+	}
 }

static void configure_thermal_target(struct device *dev)