Aaron Durbin (adurbin@chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14625
-gerrit
commit 14c092b4fec1d7a33bdbb9c527fa2eb3b3ee8e70 Author: Aaron Durbin adurbin@chromium.org Date: Thu May 5 10:34:22 2016 -0500
cpu/x86: don't treat all chipsets the same regarding XIP_ROM_SIZE
Previously, the XIP_ROM_SIZE Kconfig variable is used globally on x86 platforms with the assumption that all chipsets utilize this value. For the chipsets which do not use the variable it can lead to unnecessary alignment constraints in cbfs for romstage. Therefore, allow those chipsets a path to not be burdened by not passing '-P $(XIP_ROM_SIZE)' to cbfstool when adding romstage.
Change-Id: Id8692df5ecec116a72b8e5886d86648ca959c78b Signed-off-by: Aaron Durbin adurbin@chromium.org --- Makefile.inc | 7 ++++++- src/cpu/x86/Kconfig | 11 +++++++++++ 2 files changed, 17 insertions(+), 1 deletion(-)
diff --git a/Makefile.inc b/Makefile.inc index 94273df..9890e14 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -798,7 +798,12 @@ ifeq ($(CONFIG_ARCH_ROMSTAGE_X86_32)$(CONFIG_ARCH_ROMSTAGE_X86_64),y) # # Make sure that segment for .car.data is ignored while adding romstage. $(CONFIG_CBFS_PREFIX)/romstage-align := 64 -$(CONFIG_CBFS_PREFIX)/romstage-options := --xip -S .car.data -P $(CONFIG_XIP_ROM_SIZE) +$(CONFIG_CBFS_PREFIX)/romstage-options := --xip -S .car.data +# If XIP_ROM_SIZE isn't being used don't overly constrain romstage by passing +# -P with a default value. +ifneq ($(CONFIG_NO_FIXED_XIP_ROM_SIZE),y) +$(CONFIG_CBFS_PREFIX)/romstage-options += -P $(CONFIG_XIP_ROM_SIZE) +endif endif
cbfs-files-y += $(CONFIG_CBFS_PREFIX)/ramstage diff --git a/src/cpu/x86/Kconfig b/src/cpu/x86/Kconfig index e80f02b..74d87e2 100644 --- a/src/cpu/x86/Kconfig +++ b/src/cpu/x86/Kconfig @@ -69,8 +69,19 @@ config TSC_SYNC_MFENCE to execute an mfence instruction in order to synchronize rdtsc. This is true for all modern Intel CPUs.
+config NO_FIXED_XIP_ROM_SIZE + bool + default n + help + The XIP_ROM_SIZE Kconfig variable is used globally on x86 + with the assumption that all chipsets utilize this value. + For the chipsets which do not use the variable it can lead + to unnecessary alignment constraints in cbfs for romstage. + Therefore, allow those chipsets a path to not be burdened. + config XIP_ROM_SIZE hex + depends on !NO_FIXED_XIP_ROM_SIZE default ROM_SIZE if ROMCC default 0x10000