Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47967 )
Change subject: cpu/x86: Link entry16.inc ......................................................................
cpu/x86: Link entry16.inc
TBD: Address SPDX license header
Change-Id: I78ecd15716169b58cf6696ff8c5069ac2d5038ef Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/arch/x86/bootblock_crt0.S M src/cpu/x86/32bit/entry32.inc M src/cpu/x86/Makefile.inc R src/cpu/x86/entry16.S M src/lib/program.ld 5 files changed, 10 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/47967/1
diff --git a/src/arch/x86/bootblock_crt0.S b/src/arch/x86/bootblock_crt0.S index 10a8763..a457978 100644 --- a/src/arch/x86/bootblock_crt0.S +++ b/src/arch/x86/bootblock_crt0.S @@ -16,7 +16,6 @@ * Include the old code for reset vector and protected mode entry. That code has * withstood the test of time. */ -#include <cpu/x86/16bit/entry16.inc> #include <cpu/x86/16bit/reset16.inc> #include <cpu/x86/32bit/entry32.inc>
diff --git a/src/cpu/x86/32bit/entry32.inc b/src/cpu/x86/32bit/entry32.inc index 873a809..b28fa2f 100644 --- a/src/cpu/x86/32bit/entry32.inc +++ b/src/cpu/x86/32bit/entry32.inc @@ -13,6 +13,7 @@ */ .align 4
+.globl __protected_start __protected_start: /* Save the BIST value */ movl %eax, %ebp diff --git a/src/cpu/x86/Makefile.inc b/src/cpu/x86/Makefile.inc index 2f789f7..8862e87 100644 --- a/src/cpu/x86/Makefile.inc +++ b/src/cpu/x86/Makefile.inc @@ -5,6 +5,8 @@
subdirs-$(CONFIG_CPU_INTEL_COMMON_SMM) += ../intel/smm
+bootblock-y += entry16.S + additional-dirs += $(obj)/cpu/x86
SIPI_ELF=$(obj)/cpu/x86/sipi_vector.elf diff --git a/src/cpu/x86/16bit/entry16.inc b/src/cpu/x86/entry16.S similarity index 94% rename from src/cpu/x86/16bit/entry16.inc rename to src/cpu/x86/entry16.S index 5e90da1..7043aab 100644 --- a/src/cpu/x86/16bit/entry16.inc +++ b/src/cpu/x86/entry16.S @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ + /* * This software and ancillary information (herein called SOFTWARE) * called LinuxBIOS is made available under the terms described here. @@ -28,10 +30,11 @@ #include <arch/rom_segs.h> #include <cpu/x86/post_code.h>
-/* Symbol _start16bit must be aligned to 4kB to start AP CPUs with - * Startup IPI message without RAM. +.section ".init._start", "ax", @progbits + +/* Symbol _start16bit must reachable from the reset vector, and be aligned to + * 4kB to start AP CPUs with Startup IPI message without RAM. */ -.align 4096 .code16 .globl _start16bit .type _start16bit, @function diff --git a/src/lib/program.ld b/src/lib/program.ld index 457a20a..98e88e2 100644 --- a/src/lib/program.ld +++ b/src/lib/program.ld @@ -16,6 +16,7 @@ *(.text._start); *(.text.stage_entry); KEEP(*(.id.keep)); + *(.init._start); *(.init); *(.text); *(.text.*);
Hello build bot (Jenkins), Patrick Georgi, Martin Roth, Julius Werner,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/47967
to look at the new patch set (#2).
Change subject: cpu/x86: Link entry16.inc ......................................................................
cpu/x86: Link entry16.inc
TBD: Address SPDX license header
Change-Id: I78ecd15716169b58cf6696ff8c5069ac2d5038ef Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/arch/x86/bootblock_crt0.S M src/cpu/x86/32bit/entry32.inc M src/cpu/x86/Makefile.inc R src/cpu/x86/entry16.S M src/lib/program.ld 5 files changed, 10 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/47967/2
Hello build bot (Jenkins), Patrick Georgi, Martin Roth, Julius Werner,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/47967
to look at the new patch set (#3).
Change subject: cpu/x86: Link entry16.inc ......................................................................
cpu/x86: Link entry16.inc
TBD: Address SPDX license header
Change-Id: I78ecd15716169b58cf6696ff8c5069ac2d5038ef Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/arch/x86/bootblock_crt0.S M src/cpu/x86/32bit/entry32.inc M src/cpu/x86/Makefile.inc R src/cpu/x86/entry16.S M src/lib/program.ld 5 files changed, 10 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/47967/3
Hello build bot (Jenkins), Patrick Georgi, Martin Roth, Julius Werner,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/47967
to look at the new patch set (#4).
Change subject: cpu/x86: Link entry16.inc ......................................................................
cpu/x86: Link entry16.inc
TBD: Address SPDX license header
Change-Id: I78ecd15716169b58cf6696ff8c5069ac2d5038ef Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/arch/x86/bootblock_crt0.S M src/cpu/x86/32bit/entry32.inc M src/cpu/x86/Makefile.inc R src/cpu/x86/entry16.S 4 files changed, 10 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/47967/4
Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47967 )
Change subject: cpu/x86: Link entry16.inc ......................................................................
Patch Set 5:
(2 comments)
https://review.coreboot.org/c/coreboot/+/47967/5//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/47967/5//COMMIT_MSG@9 PS5, Line 9: TBD: Address SPDX license header no longer tbd?
https://review.coreboot.org/c/coreboot/+/47967/5/src/cpu/x86/entry16.S File src/cpu/x86/entry16.S:
https://review.coreboot.org/c/coreboot/+/47967/5/src/cpu/x86/entry16.S@a34 PS5, Line 34: .align 4096 How is this enforced now?
Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47967 )
Change subject: cpu/x86: Link entry16.inc ......................................................................
Patch Set 5:
(2 comments)
https://review.coreboot.org/c/coreboot/+/47967/5//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/47967/5//COMMIT_MSG@9 PS5, Line 9: TBD: Address SPDX license header
no longer tbd?
It is, license text change needs all authors' approvals.
https://review.coreboot.org/c/coreboot/+/47967/5/src/cpu/x86/entry16.S File src/cpu/x86/entry16.S:
https://review.coreboot.org/c/coreboot/+/47967/5/src/cpu/x86/entry16.S@a34 PS5, Line 34: .align 4096
How is this enforced now?
Right, it was too early to remove it here.
Hello build bot (Jenkins), Patrick Georgi, Martin Roth, Julius Werner,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/47967
to look at the new patch set (#6).
Change subject: cpu/x86: Link entry16.inc ......................................................................
cpu/x86: Link entry16.inc
TBD: Address SPDX license header
Change-Id: I78ecd15716169b58cf6696ff8c5069ac2d5038ef Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/arch/x86/bootblock_crt0.S M src/cpu/x86/32bit/entry32.inc M src/cpu/x86/Makefile.inc R src/cpu/x86/entry16.S 4 files changed, 10 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/47967/6
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47967 )
Change subject: cpu/x86: Link entry16.inc ......................................................................
Patch Set 8: Code-Review+2
Attention is currently required from: Kyösti Mälkki, Ron Minnich. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47967 )
Change subject: cpu/x86: Link entry16.inc ......................................................................
Patch Set 9:
(1 comment)
File src/cpu/x86/entry16.S:
https://review.coreboot.org/c/coreboot/+/47967/comment/5a93d450_1cfdfdf5 PS9, Line 1: /* SPDX-License-Identifier: BSD-3-Clause */ Do we need this or can we just keep the licence agreement below?
Attention is currently required from: Arthur Heymans, Kyösti Mälkki, Ron Minnich. Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47967 )
Change subject: cpu/x86: Link entry16.inc ......................................................................
Patch Set 9:
(1 comment)
File src/cpu/x86/entry16.S:
https://review.coreboot.org/c/coreboot/+/47967/comment/dfebb027_84fcfe21 PS9, Line 1: /* SPDX-License-Identifier: BSD-3-Clause */
Do we need this or can we just keep the licence agreement below?
We have lint checks for SPDX entries.
Attention is currently required from: Arthur Heymans, Kyösti Mälkki, Ron Minnich. ron minnich has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47967 )
Change subject: cpu/x86: Link entry16.inc ......................................................................
Patch Set 9:
(1 comment)
File src/cpu/x86/entry16.S:
https://review.coreboot.org/c/coreboot/+/47967/comment/32e83723_15912c4d PS9, Line 1: /* SPDX-License-Identifier: BSD-3-Clause */
We have lint checks for SPDX entries.
I think for historical reasons this last instance of the DOE license header ought to be kept. It's an origin story, and DOE spent the better part of $10M getting linuxbios off the ground.
Besides, the terms of the release of the code require it.
Attention is currently required from: Arthur Heymans, Kyösti Mälkki, ron minnich, Ron Minnich. Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47967 )
Change subject: cpu/x86: Link entry16.inc ......................................................................
Patch Set 9:
(1 comment)
File src/cpu/x86/entry16.S:
https://review.coreboot.org/c/coreboot/+/47967/comment/15f23331_6ddfe32c PS9, Line 1: /* SPDX-License-Identifier: BSD-3-Clause */
I think for historical reasons this last instance of the DOE license header ought to be kept. […]
So SPDX has no specific identifier for this type of LANL copyright notice (they have another format, more closely modeled after the BSD license). I think we're good just calling this BSD-3-Clause and keep this header intact: It's the same as BSD-3-Clause in spirit (even if the text they want to see reproduced differs) and we uphold the terms of the LANL license. Worst case, the BSD-3-Clause thing above could be considered a newly licensed derivative work, so it still works out.
Attention is currently required from: Marshall Dawson, Arthur Heymans, Kyösti Mälkki, ron minnich, Ron Minnich. Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47967 )
Change subject: cpu/x86: Link entry16.inc ......................................................................
Patch Set 9:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/47967/comment/003b1ded_d9cbffc2 PS5, Line 9: TBD: Address SPDX license header
It is, license text change needs all authors' approvals.
We won't change the license text, so no approval required.
Attention is currently required from: Marshall Dawson, Arthur Heymans, Kyösti Mälkki, ron minnich, Ron Minnich. Patrick Georgi has uploaded a new patch set (#10) to the change originally created by Kyösti Mälkki. ( https://review.coreboot.org/c/coreboot/+/47967 )
Change subject: cpu/x86: Link entry16.inc ......................................................................
cpu/x86: Link entry16.inc
Change-Id: I78ecd15716169b58cf6696ff8c5069ac2d5038ef Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/arch/x86/bootblock_crt0.S M src/cpu/x86/32bit/entry32.inc M src/cpu/x86/Makefile.inc R src/cpu/x86/entry16.S 4 files changed, 10 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/47967/10
Attention is currently required from: Marshall Dawson, Arthur Heymans, Kyösti Mälkki, ron minnich, Ron Minnich. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47967 )
Change subject: cpu/x86: Link entry16.inc ......................................................................
Patch Set 10: Code-Review+2
Kyösti Mälkki has submitted this change. ( https://review.coreboot.org/c/coreboot/+/47967 )
Change subject: cpu/x86: Link entry16.inc ......................................................................
cpu/x86: Link entry16.inc
Change-Id: I78ecd15716169b58cf6696ff8c5069ac2d5038ef Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/47967 Reviewed-by: Angel Pons th3fanbus@gmail.com Reviewed-by: Arthur Heymans arthur@aheymans.xyz Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/arch/x86/bootblock_crt0.S M src/cpu/x86/32bit/entry32.inc M src/cpu/x86/Makefile.inc R src/cpu/x86/entry16.S 4 files changed, 10 insertions(+), 4 deletions(-)
Approvals: build bot (Jenkins): Verified Arthur Heymans: Looks good to me, approved Angel Pons: Looks good to me, approved
diff --git a/src/arch/x86/bootblock_crt0.S b/src/arch/x86/bootblock_crt0.S index 387920e..3e9065b 100644 --- a/src/arch/x86/bootblock_crt0.S +++ b/src/arch/x86/bootblock_crt0.S @@ -10,13 +10,12 @@
#include <cpu/x86/cr.h>
-.section .init._start, "ax", @progbits +.section .init, "ax", @progbits
/* * Include the old code for reset vector and protected mode entry. That code has * withstood the test of time. */ -#include <cpu/x86/16bit/entry16.inc> #include <cpu/x86/16bit/reset16.inc> #include <cpu/x86/32bit/entry32.inc>
diff --git a/src/cpu/x86/32bit/entry32.inc b/src/cpu/x86/32bit/entry32.inc index 873a809..b28fa2f 100644 --- a/src/cpu/x86/32bit/entry32.inc +++ b/src/cpu/x86/32bit/entry32.inc @@ -13,6 +13,7 @@ */ .align 4
+.globl __protected_start __protected_start: /* Save the BIST value */ movl %eax, %ebp diff --git a/src/cpu/x86/Makefile.inc b/src/cpu/x86/Makefile.inc index cd73b72..393506b 100644 --- a/src/cpu/x86/Makefile.inc +++ b/src/cpu/x86/Makefile.inc @@ -8,6 +8,8 @@
subdirs-$(CONFIG_CPU_INTEL_COMMON_SMM) += ../intel/smm
+bootblock-y += entry16.S + additional-dirs += $(obj)/cpu/x86
SIPI_ELF=$(obj)/cpu/x86/sipi_vector.elf diff --git a/src/cpu/x86/16bit/entry16.inc b/src/cpu/x86/entry16.S similarity index 94% rename from src/cpu/x86/16bit/entry16.inc rename to src/cpu/x86/entry16.S index 5e90da1..1ecd6ed 100644 --- a/src/cpu/x86/16bit/entry16.inc +++ b/src/cpu/x86/entry16.S @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ + /* * This software and ancillary information (herein called SOFTWARE) * called LinuxBIOS is made available under the terms described here. @@ -28,8 +30,10 @@ #include <arch/rom_segs.h> #include <cpu/x86/post_code.h>
-/* Symbol _start16bit must be aligned to 4kB to start AP CPUs with - * Startup IPI message without RAM. +.section .init._start, "ax", @progbits + +/* Symbol _start16bit must reachable from the reset vector, and be aligned to + * 4kB to start AP CPUs with Startup IPI message without RAM. */ .align 4096 .code16