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I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/58289
to look at the new patch set (#2).
Change subject: soc/intel/adl: Skip sending MBP hob to save boot time ......................................................................
soc/intel/adl: Skip sending MBP hob to save boot time
MBP Hob is being generated by FSP after getting data from ME. coreboot does not consume this Hob and FSP provides an option for bootloader to skip generation of this Hob. This will help in saving ~14 ms of boot time.
Here is the data from Brya P1 Board: Before: 955 returning from FspSiliconInit 879,432 (99,156) After: 955 returning from FspSiliconInit 1,177,513 (84,506)
BUG=b:188577893 BRANCH=None TEST=No function impact on Brya system and boot time is reduced with this patch.
Change-Id: Ibb64e4d0f4ae7212defb6704b05a78e754f75cd7 Signed-off-by: MAULIK V VAGHELA maulik.v.vaghela@intel.com --- M src/soc/intel/alderlake/romstage/fsp_params.c 1 file changed, 3 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/58289/2