[M] Change in coreboot[main]: soc/intel: Refactor ITSS macros

[Subrata Banik (Code Review)]

Attention is currently required from: Arthur Heymans, Christian Walter, Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Jayvik Desai, Johnny Lin, Jonathan Zhang, Kapil Porwal, Lean Sheng Tan, Nick Vaccaro, Patrick Rudolph, Rishika Raj, Sean Rhodes, Shuo Liu, Tarun, Tim Chu, Werner Zeh.

Hello Arthur Heymans, Christian Walter, Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Jayvik Desai, Johnny Lin, Jonathan Zhang, Kapil Porwal, Lean Sheng Tan, Nick Vaccaro, Patrick Rudolph, Rishika Raj, Sean Rhodes, Shuo Liu, Tarun, Tim Chu, Werner Zeh,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/84183?usp=email

to look at the new patch set (#2).

Change subject: soc/intel: Refactor ITSS macros
......................................................................

soc/intel: Refactor ITSS macros

This patch refactors ITSS related SoC specific macros by consolidating
them into a common itss.h file. This improves code maintainability and
reduces redundancy as each SoC previously defined the same macros.

Specific changes include:

- Move SoC specific ITSS macros into intelblocks/itss.h.
- SoC code now includes intelblocks/itss.h instead of the SoC-local
  soc/itss.h.
- Drop soc/itss.h from static ASL files.
- Delete soc/itss.h from all SoC locals except Apollo Lake and
  Sky Lake.

TEST=Able to build and boot google/hatch, google/xol and google/karis.

Change-Id: I6461dc93b0d21bec5429075bc26435bae3754d74
Signed-off-by: Subrata Banik 
---
M src/soc/intel/alderlake/acpi/southbridge.asl
M src/soc/intel/alderlake/chip.c
D src/soc/intel/alderlake/include/soc/itss.h
M src/soc/intel/apollolake/include/soc/itss.h
D src/soc/intel/cannonlake/include/soc/itss.h
M src/soc/intel/common/block/include/intelblocks/itss.h
M src/soc/intel/common/block/itss/itss.c
M src/soc/intel/elkhartlake/acpi/southbridge.asl
M src/soc/intel/elkhartlake/chip.c
D src/soc/intel/elkhartlake/include/soc/itss.h
M src/soc/intel/jasperlake/acpi/southbridge.asl
M src/soc/intel/jasperlake/chip.c
D src/soc/intel/jasperlake/include/soc/itss.h
M src/soc/intel/meteorlake/acpi/southbridge.asl
M src/soc/intel/meteorlake/chip.c
D src/soc/intel/meteorlake/include/soc/itss.h
M src/soc/intel/skylake/acpi/pch.asl
M src/soc/intel/skylake/chip.c
M src/soc/intel/skylake/include/soc/itss.h
M src/soc/intel/tigerlake/acpi/southbridge.asl
M src/soc/intel/tigerlake/chip.c
D src/soc/intel/tigerlake/include/soc/itss.h
M src/soc/intel/xeon_sp/gnr/soc_acpi.c
D src/soc/intel/xeon_sp/include/soc/itss.h
24 files changed, 9 insertions(+), 92 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/83/84183/2