Change in coreboot[master]: soc/mediatek/mt8186: revise SPI NOR GPIO selection

[Rex-BC Chen (Code Review)]

Attention is currently required from: Hung-Te Lin.
Hello Hung-Te Lin,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/59940

to look at the new patch set (#2).

Change subject: soc/mediatek/mt8186: revise SPI NOR GPIO selection
......................................................................

soc/mediatek/mt8186: revise SPI NOR GPIO selection

The setting of SPI NOR GPIOs should be:
CS: pull up.
CLK/IO0/IO1: pull down.

BUG=b:202871018
TEST=build pass

Signed-off-by: Rex-BC Chen 
Change-Id: Ideacb797a1dc9999ab6ba00cf33adbbbc24213dc
---
M src/soc/mediatek/mt8186/spi.c
1 file changed, 13 insertions(+), 11 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/59940/2