Change in coreboot[master]: soc/intel/alderlake: Add set batteryinfo support

[Sumeet R Pawnikar (Code Review)]

Attention is currently required from: Tim Wawrzynczak, Patrick Rudolph.
Sumeet R Pawnikar has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/59262 )

Change subject: soc/intel/alderlake: Add set batteryinfo support
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soc/intel/alderlake: Add set batteryinfo support

Add set batteryinfo support under acpi for Alder Lake.

BUG=b:206057712
BRANCH=None
TEST=Build and test on brya system

Change-Id: I02350a2c8e3dd4cdb061a6976f44e4b839a305a4
Signed-off-by: Sumeet Pawnikar 
---
M src/soc/intel/alderlake/acpi.c
1 file changed, 4 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/59262/1

diff --git a/src/soc/intel/alderlake/acpi.c b/src/soc/intel/alderlake/acpi.c
index 0fb989d..0096505 100644
--- a/src/soc/intel/alderlake/acpi.c
+++ b/src/soc/intel/alderlake/acpi.c
@@ -9,6 +9,7 @@
 #include <device/device.h>
 #include <device/pci_ops.h>
 #include <ec/google/chromeec/ec.h>
+#include <ec/google/chromeec/ec_commands.h>
 #include <intelblocks/cpulib.h>
 #include <intelblocks/pmclib.h>
 #include <intelblocks/acpi.h>
@@ -283,6 +284,9 @@

/* Get the powerinfo config details */
    ret = google_chromeec_get_powerinfo_config();
+
+	/* Set the batteryinfo config details */
+	google_chromeec_set_batteryinfo_config(ISL9241_BC12_MIN_VOLTAGE);
 }

int soc_madt_sci_irq_polarity(int sci)