[S] Change in coreboot[master]: vc/amd/fsp/phoenix/platform_descriptors: add PCIe gen 4 link speed - coreboot-gerrit

14 Apr 2023


      Attention is currently required from: Jason Glenesk, Fred Reitberger, Tim Van Patten.
Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74378 )
Change subject: vc/amd/fsp/phoenix/platform_descriptors: add PCIe gen 4 link speed
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Patch Set 1: Code-Review-1
(1 comment)
File src/vendorcode/amd/fsp/phoenix/platform_descriptors.h:
https://review.coreboot.org/c/coreboot/+/74378/comment/e4351351_4c8dd46f 
PS1, Line 194: 	uint32_t	link_speed_capability	:2;	// See dxio_link_speed_cap
...
using GEN4 enum value overflows this field
oh, this is a 3 bit field in agesa while it's still a 2 bit field in coreboot. i'll rework this
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I74f0b79e336206113ade24a87cbd161a12967f56
Gerrit-Change-Number: 74378
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