Attention is currently required from: Cliff Huang, Kapil Porwal, Pranava Y N, Subrata Banik.
Saurabh Mishra has posted comments on this change by Saurabh Mishra. ( https://review.coreboot.org/c/coreboot/+/83798?usp=email )
Change subject: soc/intel/ptl: Do initial Panther Lake SoC commit till ramstage
......................................................................
Patch Set 39:
(5 comments)
File src/soc/intel/pantherlake/Makefile.mk:
https://review.coreboot.org/c/coreboot/+/83798/comment/28db7e0b_e8df6f43?usp... :
PS38, Line 39: ramstage-y += me.c
do we need this ?
Removed in patchset 39
https://review.coreboot.org/c/coreboot/+/83798/comment/20cfc6c0_f9e464e3?usp... :
PS38, Line 61:
: CFLAGS_common += -fshort-wchar
this has been fixed in MTL, follow https://review.coreboot. […]
Ack, removed.
File src/soc/intel/pantherlake/gspi.c:
https://review.coreboot.org/c/coreboot/+/83798/comment/654735bb_e2d70b8b?usp... :
PS38, Line 15: }
Correct to 2.
Please ignore above respoonse. Will update the GSPI to #3 and their corresponding entries.
File src/soc/intel/pantherlake/systemagent.c:
https://review.coreboot.org/c/coreboot/+/83798/comment/20b1e69f_a6a84754?usp... :
PS38, Line 27: { PCIEXBAR, CONFIG_ECAM_MMCONF_BASE_ADDRESS, CONFIG_ECAM_MMCONF_LENGTH,
: "PCIEXBAR" },
https://review.coreboot. […]
Ack, removed.
File src/soc/intel/pantherlake/tcss.c:
https://review.coreboot.org/c/coreboot/+/83798/comment/650694cc_fcdc0a31?usp... :
PS38, Line 6: const struct soc_tcss_ops tcss_ops = {
: };
:
drop this if we don;t have any need
Acknowledged, removed.
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