Patch set updated for coreboot: nb/gm45/gma.c: Allow to set pwm frequency from nvram.

[Arthur Heymans]

Arthur Heymans ([e-mail]) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18191

-gerrit

commit f9cb20c0024917225747fcf975aec6cec9dd23ef
Author: Arthur Heymans 
Date:   Fri Jan 20 17:36:20 2017 +0100

nb/gm45/gma.c: Allow to set pwm frequency from nvram.

Change-Id: I968ff3548a732c08ab51d764d0f7311f3bbce620
    Signed-off-by: Arthur Heymans 
---
 src/mainboard/lenovo/x200/cmos.layout |  1 +
 src/northbridge/intel/gm45/gma.c      | 32 +++++++++++++++++++++++---------
 2 files changed, 24 insertions(+), 9 deletions(-)

diff --git a/src/mainboard/lenovo/x200/cmos.layout b/src/mainboard/lenovo/x200/cmos.layout
index 35d5017..e77aa5e 100644
--- a/src/mainboard/lenovo/x200/cmos.layout
+++ b/src/mainboard/lenovo/x200/cmos.layout
@@ -79,6 +79,7 @@ entries
 # coreboot config options: northbridge
 944         8       h       0        volume
 952	    4	    e	    11	     gfx_uma_size
+956	    13	    h	    0	     pwm_freq

# coreboot config options: check sums
 984          16       h       0        check_sum
diff --git a/src/northbridge/intel/gm45/gma.c b/src/northbridge/intel/gm45/gma.c
index 4886bb2..a91a8a2 100644
--- a/src/northbridge/intel/gm45/gma.c
+++ b/src/northbridge/intel/gm45/gma.c
@@ -34,6 +34,7 @@
 #include <drivers/intel/gma/i915.h>
 #include <pc80/vga.h>
 #include <pc80/vga_io.h>
+#include <pc80/mc146818rtc.h>

#define BASE_FREQUENCY 96000

@@ -646,7 +647,8 @@ static void gma_pm_init_post_vbios(struct device *const dev)
    const struct northbridge_intel_gm45_config *const conf = dev->chip_info;

u32 reg32;
-	u8 reg8;
+	u8 duty;
+	u16 pwm_freq;

/* Setup Panel Power On Delays */
    reg32 = gtt_read(PP_ON_DELAYS);
@@ -674,14 +676,26 @@ static void gma_pm_init_post_vbios(struct device *const dev)

/* Enable Backlight  */
    gtt_write(BLC_PWM_CTL2, (1 << 31));
-	reg8 = 100;
-	if (conf->duty_cycle != 0)
-		reg8 = conf->duty_cycle;
-	if (conf->pwm_freq == 0)
-		gtt_write(BLC_PWM_CTL, 0x06100610);
-	else
-		gtt_write(BLC_PWM_CTL, freq_to_blc_pwm_ctl(dev,
-						conf->pwm_freq,	reg8));
+
+	reg32 = 0x06100610;
+	duty = 100;
+	pwm_freq = 0;
+	if (conf->duty_cycle)
+		duty = conf->duty_cycle;
+
+	if (conf->pwm_freq)
+		pwm_freq = conf->pwm_freq;
+	get_option(&pwm_freq, "pwm_freq");
+	/* Check for sanity of cmos value */
+	if (pwm_freq < 50) {
+		printk(BIOS_DEBUG,
+			"PWM freq below treshhold, using default value\n");
+		pwm_freq = conf->pwm_freq;
+	}
+
+	if (pwm_freq)
+		reg32 = freq_to_blc_pwm_ctl(dev, pwm_freq, duty);
+	gtt_write(BLC_PWM_CTL, reg32);
 }

static void gma_func0_init(struct device *dev)