[M] Change in coreboot[master]: mb/google/myst: Enable PCIe devices in devicetree

[Jon Murphy (Code Review)]

Attention is currently required from: Raul Rangel, Martin L Roth, Tim Van Patten, Karthik Ramasubramanian, Felix Held.

Jon Murphy has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74112 )

Change subject: mb/google/myst: Enable PCIe devices in devicetree
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Patch Set 37:

(1 comment)

File src/mainboard/google/myst/port_descriptors.c:

https://review.coreboot.org/c/coreboot/+/74112/comment/73913b4b_b5c3cc5b 
PS36, Line 44: 	{ /* SSD TODO(b/277815815): Enable PCIe GEN4 when supported */
> Also can you please check whether NVME <-> eMMC bridge is used and if so which engine and how many l […]

We do use the bridge, our option is BH799BB.  go/bayhub-reference.  It uses a single lane and should use the PCIE_ENGINE.  I'm not sure if I have a good way to detect if it's present like what was used on Markarth and Whiterun, do we need to add a fw_config field?